C8051F120 Datasheet, PDF (344/356 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR PCA0CPH0: 0xFC, PCA0CPH1: 0xFD, PCA0CPH2: 0xEA, PCA0CPH3: 0xEC, PCA0CPH4: 0xEE, PCA0CPH5:
Address: 0xE2
SFR
Page:
PCA0CPH0:
PCA0CPH5:
page
page
0,
0
PCA0CPH1:
page
0,
PCA0CPH2:
page
0,
PCA0CPH3:
page
0,
PCA0CPH4:
page
0,
Bits7-0: PCA0CPHn: PCA0 Capture Module High Byte.
The PCA0CPHn register holds the high byte (MSB) of the 16-bit capture module n.
Figure 24.16. PCA0CPHn: PCA0 Capture Module High Byte
344
Rev. 1.3