C8051F120 Datasheet, PDF (230/356 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
17.6.1.3.8-bit MOVX with Bank Select: EMI0CF[4:2] = ‘110’.
Nonmuxed 8-bit WRITE with Bank Select
ADDR[15:8]
P1/P5
EMIF ADDRESS (8 MSBs) from EMI0CN
ADDR[7:0]
P2/P6
EMIF ADDRESS (8 LSBs) from R0 or R1
DATA[7:0]
P3/P7
/WR P0.7/P4.7
T
ACS
EMIF WRITE DATA
T
WDS
T
ACW
T
WDH
T
ACH
/RD P0.6/P4.6
P1/P5
P2/P6
P3/P7
P0.7/P4.7
P0.6/P4.6
ADDR[15:8]
P1/P5
Nonmuxed 8-bit READ with Bank Select
EMIF ADDRESS (8 MSBs) from EMI0CN
P1/P5
ADDR[7:0]
P2/P6
EMIF ADDRESS (8 LSBs) from R0 or R1
P2/P6
DATA[7:0]
P3/P7
/RD P0.6/P4.6
T
ACS
EMIF READ DATA
T
RDS
T
ACW
T
RDH
T
ACH
P3/P7
P0.6/P4.6
/WR P0.7/P4.7
P0.7/P4.7
Figure 17.9. Non-multiplexed 8-bit MOVX with Bank Select Timing
232
Rev. 1.3