C8051F120 Datasheet, PDF (148/356 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
Table 11.3. Special Function Registers
SFRs are listed in alphabetical order. All undefined SFR locations are reserved.
Register
Address
SFR
Page
Description
ACC
0xE0 All Pages Accumulator
ADC0CF
0xBC
0 ADC0 Configuration
ADC0CN
0xE8
0 ADC0 Control
ADC0GTH
0xC5
0 ADC0 Greater-Than High Byte
ADC0GTL
0xC4
0 ADC0 Greater-Than Low Byte
ADC0H
0xBF
0 ADC0 Data Word High Byte
ADC0L
0xBE
0 ADC0 Data Word Low Byte
ADC0LTH
0xC7
0 ADC0 Less-Than High Byte
ADC0LTL
ADC2
ADC2CF
ADC2CN
ADC2GT
ADC2LT
AMX0CF
0xC6
0xBE
0xBC
0xE8
0xC4
0xC6
0xBA
0 ADC0 Less-Than Low Byte
2 ADC2 Data Word
2 ADC2 Configuration
2 ADC2 Control
2 ADC2 Greater-Than
2 ADC2 Less-Than
0 ADC0 Multiplexer Configuration
AMX0SL
AMX2CF
AMX2SL
B
CCH0CN
CCH0LC
CCH0MA
CCH0TN
CKCON
CLKSEL
CPT0CN
CPT0MD
CPT1CN
0xBB
0xBA
0xBB
0xF0
0xA1
0xA3
0x9A
0xA2
0x8E
0x97
0x88
0x89
0x88
0 ADC0 Multiplexer Channel Select
2 ADC2 Multiplexer Configuration
2 ADC2 Multiplexer Channel Select
All Pages B Register
F Cache Control
F Cache Lock
F Cache Miss Accumulator
F Cache Tuning
0 Clock Control
F System Clock Select
1 Comparator 0 Control
1 Comparator 0 Configuration
2 Comparator 1 Control
148
Rev. 1.3
Page No.
page 157
page 64^*1,
page 82^*2
page 65^*1,
page 83^*2
page 68^*1,
page 86^*2
page 68^*1,
page 86^*2
page 66^*1,
page 84^*2
page 66^*1,
page 84^*2
page 69^*1,
page 86^*2
page 69^*1,
page 87^*2
page 101^*3
page 99^*3
page 100^*3
page 104^*3
page 104^*3
page 62^*1,
page 80^*2
page 63^*1,
page 81^*2
page 97^*3
page 98^*3
page 157
page 217
page 218
page 219
page 218
page 319
page 192
page 124
page 125
page 126