C8051F120 Datasheet, PDF (152/356 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
Table 11.3. Special Function Registers (Continued)
SFRs are listed in alphabetical order. All undefined SFR locations are reserved.
Register
Address
SFR
Page
Description
TMR3H
0xCD
1 Timer 3 High Byte
TMR3L
0xCC
1 Timer 3 Low Byte
TMR4CF
0xC9
2 Timer/Counter 4 Configuration
TMR4CN
0xC8
2 Timer/Counter 4 Control
TMR4H
0xCD
2 Timer/Counter 4 High Byte
TMR4L
0xCC
2 Timer/Counter 4 Low Byte
WDTCN
0xFF All Pages Watchdog Timer Control
XBR0
0xE1
F Port I/O Crossbar Control 0
XBR1
0xE2
F Port I/O Crossbar Control 1
XBR2
0xE3
F Port I/O Crossbar Control 2
*1 _{Refers to a register in the C8051F120/1/4/5 only.}
*2 _{Refers to a register in the C8051F122/3/6/7 and C8051F130/1/2/3 only.}
*3 _{Refers to a register in the C8051F120/1/2/3/4/5/6/7 only.}
*4 _{Refers to a register in the C8051F120/1/2/3 and C8051F130/1/2/3 only.}
*5 _{Refers to a register in the C8051F120/2/4/6 only.}
*6 _{Refers to a register in the C8051F121/3/5/7 only.}
*7 _{Refers to a register in the C8051F130/1/2/3 only.}
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Rev. 1.3