C8051F120 Datasheet, PDF (172/356 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
The example below shifts the MAC0 accumulator left one bit, and then right two bits:
MOV MAC0OVR, #40h ; The next few instructions load the accumulator with the value
MOV MAC0ACC3, #88h ; 4088442211 Hex.
MOV MAC0ACC2, #44h
MOV MAC0ACC1, #22h
MOV MAC0ACC0, #11h
MOV MAC0CF, #20h ; Initiate a Left-shift
NOP
; After this instruction, the accumulator should be 0x8110884422
NOP
; The rounding register is updated after this instruction
MOV MAC0CF, #30h ; Initiate a Right-shift
MOV MAC0CF, #30h ; Initiate a second Right-shift
NOP
; After this instruction, the accumulator should be 0xE044221108
NOP
; The rounding register is updated after this instruction
Figure 12.7. MAC0 Accumulator Shift Example
174
Rev. 1.3