C8051F120 Datasheet, PDF (113/356 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
.
Table 8.1. DAC Electrical Characteristics
VDD = 3.0 V, AV+ = 3.0 V, VREF = 2.40 V (REFBE = 0), No Output Load unless otherwise specified
Parameter
Conditions
Min Typ Max Units
Static Performance
Resolution
12
bits
Integral Nonlinearity
±1.5
LSB
Differential Nonlinearity
±1 LSB
Output Noise
No Output Filter
100 kHz Output Filter
10 kHz Output Filter
250
µVrms
128
41
Offset Error
Data Word = 0x014
±3 ±30 mV
Offset Tempco
6
ppm/°C
Full-Scale Error
±20 ±60 mV
Full-Scale Error Tempco
10
ppm/°C
VDD Power Supply Rejection
Ratio
-60
dB
Output Impedance in Shutdown DACnEN = 0
Mode
100
kΩ
Output Sink Current
300
µA
Output Short-Circuit Current Data Word = 0xFFF
15
mA
Dynamic Performance
Voltage Output Slew Rate
Load = 40pF
0.44
V/µs
Output Settling Time to 1/2 LSB Load = 40pF, Output swing from
10
µs
code 0xFFF to 0x014
Output Voltage Swing
0
VREF- V
1LSB
Startup Time
10
µs
Analog Outputs
Load Regulation
I_L = 0.01mA to 0.3mA at code
0xFFF
60
ppm
Power Consumption (each DAC)
Power Supply Current (AV+
supplied to DAC)
Data Word = 0x7FF
110 400 µA
Rev. 1.3
113