C8051F120 Datasheet, PDF (10/356 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
Figure 5.16. 12-Bit ADC0 Window Interrupt Example: Right Justified Single-Ended
Data 70
Figure 5.17. 12-Bit ADC0 Window Interrupt Example: Right Justified Differential Data
71
Figure 5.18. 12-Bit ADC0 Window Interrupt Example: Left Justified Single-Ended Data
72
Figure 5.19. 12-Bit ADC0 Window Interrupt Example: Left Justified Differential Data .
73
6. ADC0 (10-Bit ADC, C8051F122/3/6/7 and C8051F13x Only)................................ 75
Figure 6.1. 10-Bit ADC0 Functional Block Diagram ................................................. 75
Figure 6.2. Typical Temperature Sensor Transfer Function..................................... 76
Figure 6.3. ADC0 Track and Conversion Example Timing....................................... 78
Figure 6.4. ADC0 Equivalent Input Circuits.............................................................. 79
Figure 6.5. AMX0CF: AMUX0 Configuration Register ............................................. 80
Figure 6.6. AMX0SL: AMUX0 Channel Select Register........................................... 81
Figure 6.7. ADC0CF: ADC0 Configuration Register ................................................ 82
Figure 6.8. ADC0CN: ADC0 Control Register.......................................................... 83
Figure 6.9. ADC0H: ADC0 Data Word MSB Register .............................................. 84
Figure 6.10. ADC0L: ADC0 Data Word LSB Register.............................................. 84
Figure 6.11. ADC0 Data Word Example................................................................... 85
Figure 6.12. ADC0GTH: ADC0 Greater-Than Data High Byte Register .................. 86
Figure 6.13. ADC0GTL: ADC0 Greater-Than Data Low Byte Register.................... 86
Figure 6.14. ADC0LTH: ADC0 Less-Than Data High Byte Register........................ 87
Figure 6.15. ADC0LTL: ADC0 Less-Than Data Low Byte Register ......................... 87
Figure 6.16. 10-Bit ADC0 Window Interrupt Example: Right Justified Single-Ended
Data 88
Figure 6.17. 10-Bit ADC0 Window Interrupt Example: Right Justified Differential Data
89
Figure 6.18. 10-Bit ADC0 Window Interrupt Example: Left Justified Single-Ended Data
90
Figure 6.19. 10-Bit ADC0 Window Interrupt Example: Left Justified Differential Data .
91
7. ADC2 (8-Bit ADC, C8051F12x Only)...................................................................... 93
Figure 7.1. ADC2 Functional Block Diagram............................................................ 93
Figure 7.2. ADC2 Track and Conversion Example Timing....................................... 95
Figure 7.3. ADC2 Equivalent Input Circuit................................................................ 96
Figure 7.4. AMX2CF: AMUX2 Configuration Register ............................................. 97
Figure 7.5. AMX2SL: AMUX2 Channel Select Register........................................... 98
Figure 7.6. ADC2CF: ADC2 Configuration Register ................................................ 99
Figure 7.7. ADC2CN: ADC2 Control Register........................................................ 100
Figure 7.8. ADC2: ADC2 Data Word Register ....................................................... 101
Figure 7.9. ADC2 Data Word Example .................................................................. 101
Figure 7.10. ADC2 Window Compare Examples, Single-Ended Mode.................. 102
Figure 7.11. ADC2 Window Compare Examples, Differential Mode ...................... 103
Figure 7.12. ADC2GT: ADC2 Greater-Than Data Byte Register ........................... 104
10
Rev. 1.3