C8051F120 Datasheet, PDF (280/356 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
Master
Device 1
NSS
MISO
MOSI
SCK
GPIO
GPIO
MISO
MOSI
SCK
NSS
Master
Device 2
Figure 20.2. Multiple-Master Mode Connection Diagram
Master
Device MISO
MOSI
SCK
Slave
MISO Device
MOSI
SCK
Figure 20.3. 3-Wire Single Master and 3-Wire Single Slave Mode Connection Diagram
Master
Device
GPIO
MISO
MOSI
SCK
NSS
MISO
MOSI
SCK
NSS
Slave
Device
MISO
MOSI
SCK
NSS
Slave
Device
Figure 20.4. 4-Wire Single Master Mode and 4-Wire Slave Mode Connection Diagram
280
Rev. 1.3