C8051F120 Datasheet, PDF (1/356 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
Mixed Signal ISP Flash MCU Family
Analog Peripherals
- 10 or 12-bit SAR ADC
• ± 1 LSB INL
• Programmable Throughput up to 100 ksps
• Up to 8 External Inputs; Programmable as Single-
Ended or Differential
• Programmable Amplifier Gain: 16, 8, 4, 2, 1, 0.5
• Data-Dependent Windowed Interrupt Generator
• Built-in Temperature Sensor
- 8-bit SAR ADC (‘F12x Only)
• Programmable Throughput up to 500 ksps
• 8 External Inputs (Single-Ended or Differential)
• Programmable Amplifier Gain: 4, 2, 1, 0.5
- Two 12-bit DACs (‘F12x Only)
• Can Synchronize Outputs to Timers for Jitter-Free
Waveform Generation
- Two Analog Comparators
- Voltage Reference
- VDD Monitor/Brown-Out Detector
On-Chip JTAG Debug & Boundary Scan
- On-chip debug circuitry facilitates full-speed, non-
intrusive in-circuit/in-system debugging
- Provides breakpoints, single-stepping, watchpoints,
stack monitor; inspect/modify memory and registers
- Superior performance to emulation systems using
ICE-chips, target pods, and sockets
- IEEE1149.1 compliant boundary scan
- Complete development kit
100-Pin TQFP or 64-Pin TQFP Packaging
- Temperature Range: -40°C to +85°C
High Speed 8051 µC Core
- Pipelined Instruction Architecture; Executes 70% of
Instruction Set in 1 or 2 System Clocks
- 100 MIPS or 50 MIPS Throughput with On-chip PLL
- 2-cycle 16 x 16 MAC Engine (C8051F120/1/2/3 and
C8051F130/1/2/3 Only)
Memory
- 8448 Bytes Internal Data RAM (8k + 256)
- 128k or 64k Bytes Banked FLASH; In-System pro-
grammable in 1024-byte Sectors
- External 64k Byte Data Memory Interface (program-
mable multiplexed or non-multiplexed modes)
Digital Peripherals
- 8 Byte-Wide Port I/O (100TQFP); 5V tolerant
- 4 Byte-Wide Port I/O (64TQFP); 5V tolerant
- Hardware SMBus™ (I²C™ Compatible), SPI™, and
Two UART Serial Ports Available Concurrently
- Programmable 16-bit Counter/Timer Array with
6 Capture/Compare Modules
- 5 General Purpose 16-bit Counter/Timers
- Dedicated Watchdog Timer; Bi-directional Reset Pin
Clock Sources
- Internal Precision Oscillator: 24.5 MHz
- Flexible PLL technology
- External Oscillator: Crystal, RC, C, or Clock
Voltage Supples
- Range: 2.7-3.6V (50 MIPS) 3.0-3.6V (100 MIPS)
- Power Saving Sleep and Shutdown Modes
ANALOG PERIPHERALS
VREF
PGA
10/12-bit
100ksps
ADC
+
+
-
-
VOLTAGE
COMPARATORS
TEMP
SENSOR
8-bit
PGA 500ksps
ADC
C8051F12x Only
12-Bit
DAC
12-Bit
DAC
DIGITAL I/O
UART0
UART1
SMBus
SPI Bus
PCA
Timer 0
Port 0
Port 1
Port 2
Port 3
Timer 1
Timer 2
Timer 3
Timer 4
Port 4
Port 5
Port 6
Port 7
64 pin 100 pin
HIGH-SPEED CONTROLLER CORE
8051 CPU 128/64 kB 8448 B 16 x 16 MAC
(50 or 100MIPS) ISP FLASH SRAM ('F120/1/2/3, 'F13x)
20
DEBUG CLOCK / PLL
INTERRUPTS CIRCUITRY CIRCUIT
JTAG
Rev. 1.3 8/04
Copyright © 2004 by Silicon Laboratories
C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3