C8051F120 Datasheet, PDF (147/356 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
0
1
B8 2
3
F
0
1
B0 2
3
F
0
1
A8 2
3
F
0
1
A0 2
3
F
0
1
98 2
3
F
0
1
90 2
3
F
0
1
88 2
3
F
0
1
80 2
3
F
Table 11.2. Special Function Register (SFR) Memory Map (Continued)
IP
(ALL
PAGES)
SADEN0 AMX0CF AMX0SL ADC0CF
AMX2CF AMX2SL ADC2CF
ADC0L
ADC2
ADC0H
P3
(ALL
PAGES)
IE
(ALL
PAGES)
P2
(ALL
PAGES)
SCON0
SCON1
PSBANK
(ALL
PAGES)
SADDR0
EMI0TC
CCH0CN
SBUF0
SBUF1
EMI0CN
CCH0TN
SPI0CFG
FLSCL
FLACL
EMI0CF
P1MDIN
CCH0LC P0MDOUT P1MDOUT P2MDOUT P3MDOUT
SPI0DAT
SPI0CKR
P1
(ALL
PAGES)
TCON
CPT0CN
CPT1CN
SSTA0
CCH0MA
P4MDOUT P5MDOUT P6MDOUT P7MDOUT
MAC0BL
TMOD
CPT0MD
CPT1MD
MAC0BH
TL0
MAC0ACC0 MAC0ACC1 MAC0ACC2 MAC0ACC3 MAC0OVR
SFRPGCN CLKSEL
TL1
TH0
TH1
CKCON
PSCTL
FLSTAT PLL0CN OSCICN OSCICL OSCXCN PLL0DIV PLL0MUL PLL0FLT
P0
(ALL
PAGES)
SP
(ALL
PAGES)
DPL
(ALL
PAGES)
DPH
(ALL
PAGES)
SFRPAGE
(ALL
PAGES)
SFRNEXT
(ALL
PAGES)
SFRLAST
(ALL
PAGES)
PCON
(ALL
PAGES)
0(8)
1(9)
2(A)
3(B)
4(C)
5(D)
6(E)
7(F)
Rev. 1.3
147