C8051F120 Datasheet, PDF (144/356 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
-
-
-
-
-
-
-
SFRPGEN 00000001
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address: 0x96
SFR Page: F
Bits7-1:
Bit0:
Reserved.
SFRPGEN: SFR Automatic Page Control Enable.
Upon interrupt, the C8051 Core will vector to the specified interrupt service routine and auto-
matically switch the SFR page to the corresponding peripheral or function’s SFR page. This
bit is used to control this autopaging function.
0: SFR Automatic Paging disabled. C8051 core will not automatically change to the appro-
priate SFR page (i.e., the SFR page that contains the SFR’s for the peripheral/function that
was the source of the interrupt).
1: SFR Automatic Paging enabled. Upon interrupt, the C8051 will switch the SFR page to
the page that contains the SFR’s for the peripheral or function that is the source of the inter-
rupt.
Figure 11.11. SFRPGCN: SFR Page Control Register
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address: 0x84
SFR Page: All Pages
Bits7-0:
SFR Page Bits: Byte Represents the SFR Page the C8051 MCU uses when reading or mod-
ifying SFR’s.
Write: Sets the SFR Page.
Read: Byte is the SFR page the C8051 MCU is using.
When enabled in the SFR Page Control Register (SFRPGCN), the C8051 will automatically
switch to the SFR Page that contains the SFR’s of the corresponding peripheral/function that
caused the interrupt, and return to the previous SFR page upon return from interrupt (unless
SFR Stack was altered before a returning from the interrupt).
SFRPAGE is the top byte of the SFR Page Stack, and push/pop events of this stack are
caused by interrupts (and not by reading/writing to the SFRPAGE register)
Figure 11.12. SFRPAGE: SFR Page Register
144
Rev. 1.3