M16C29 Datasheet, PDF (97/499 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/Tiny SERIES

M16C/29 Group
9. Interrupts
9.2 Interrupts and Interrupt Vector
One interrupt vector consists of 4 bytes. Set the start address of each interrupt routine in the respective
interrupt vectors. When an interrupt request is accepted, the CPU branches to the address set in the
corresponding interrupt vector. Figure 9.2 shows the interrupt vector.
MSB
LSB
Vector address (L)
Low address
Mid address
0000
High address
Vector address (H)
0000
0000
Figure 9.2 Interrupt Vector
9.2.1 Fixed Vector Tables
The fixed vector tables are allocated to the addresses from FFFDC16 to FFFFF16. Table 9.1 lists the
fixed vector tables. In the flash memory version of MCU, the vector addresses (H) of fixed vectors are
used by the ID code check function. For details, refer to the section "flash memory rewrite disabling
function".
Table 9.1 Fixed Vector Tables
Interrupt source
Vector table addresses
Remarks
Reference
Address (L) to address (H)
Undefined instruction FFFDC16 to FFFDF16 Interrupt on UND instruction M16C/60, M16C/20
Overflow
BRK instruction
FFFE016 to FFFE316
FFFE416 to FFFE716
Interrupt on INTO instruction
If the contents of address
FFFE716 is FF16, program ex-
ecution starts from the address
shown by the vector in the
relocatable vector table
serise software
maual
Address match
FFFE816 to FFFEB16
Address match interrupt
Single step (1)
Watchdog timer
Oscillation stop and
re-oscillation detection,
FFFEC16 to FFFEF16
FFFF016 to FFFF316
Watchdog timer,
clock generating circuit,
voltage detection circuit
low voltage detection
________
DBC (1)
_______
NMI
FFFF416 to FFFF716
FFFF816 to FFFFB16
_______
NMI interrupt
Reset(2)
FFFFC16 to FFFFF16
Reset
NOTE:
1. Do not normally use this interrupt because it is provided exclusively for use by development tools.
Rev. 1.12 Mar.30, 2007
REJ09B0101-0112
page 73 _{of 458}