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M16C29 Datasheet, PDF (119/499 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/Tiny SERIES
M16C/29 Group
11. DMAC
DMAi Source Pointer (i = 0, 1) (1)
(b23)
b7
(b19)
b3
(b16)(b15)
b0 b7
(b8)
b0 b7
b0 Symbol
SAR0
SAR1
Address
002216 to 002016
003216 to 003016
After Reset
Undefined
Undefined
Function
Setting Range
RW
Set the source address of transfer
0000016 to FFFFF16 RW
Nothing is assigned. If necessary, set 0. When read, the contents
are 0
NOTE:
1. If the DSD bit in the DMiCON register is 0 (fixed), this register can only be written to when the DMAE bit in the
DMiCON register is set to 0 (DMA disabled).
If the DSD bit is set to 1 (forward direction), this register can be written to at any time.
If the DSD bit is set to 1 and the DMAE bit is set to 1 (DMA enabled), the DMAi forward address pointer can be
read from this register. Otherwise, the value written to it can be read.
DMAi Destination Pointer (i = 0, 1)(1)
(b23)
b7
(b19)
b3
(b16)(b15)
b0 b7
(b8)
b0 b7
b0 Symbol
DAR0
DAR1
Address
002616 to 002416
003616 to 003416
After Reset
Undefined
Undefined
Function
Setting Range
RW
Set the destination address of transfer
0000016 to FFFFF16 RW
Nothing is assigned. If necessary, set 0. When read, the contents
are 0
NOTE:
1. If the DAD bit in the DMiCON register is 0 (fixed), this register can only be written to when the DMAE bit in the
DMiCON register is set to 0 (DMA disabled).
If the DAD bit is set to 1 (forward direction), this register can be written to at any time.
If the DAD bit is set to 1 and the DMAE bit is set to 1 (DMA enabled), the DMAi forward address pointer can be
read from this register. Otherwise, the value written to it can be read.
DMAi Transfer Counter (i = 0, 1)
(b15)
b7
(b8)
b0 b7
b0
Symbol
TCR0
TCR1
Address
002916, 002816
003916, 003816
After Reset
Undefined
Undefined
Function
Setting Range
RW
Set the transfer count minus 1. The written value is
stored in the DMAi transfer counter reload register,
and when the DMAE bit in the DMiCON register is
set to 1 (DMA enabled) or the DMAi transfer
counter underflows when the DMASL bit in the
000016 to FFFF16 RW
DMiCON register is 1 (repeat transfer), the value
of the DMAi transfer counter reload register is
transferred to the DMAi transfer counter.
When read, the DMAi transfer counter is read
Figure 11.4 SAR0, SAR1, DAR0, DAR1, TCR0, and TCR1 Registers
Rev. 1.12 Mar.30, 2007
REJ09B0101-0112
page 95 of 458