M16C29 Datasheet, PDF (365/499 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/Tiny SERIES

M16C/29 Group
20. Flash Memory Version
Flash Memory Control Register 0
b7 b6 b5 b4 b3 b2 b1 b0
00
Symbol
FMR0
Address
01B716
After Reset
000000012
Bit Symbol
Bit Name
Function
RW
FMR00 RY/BY status flag
0: Busy (during writing or erasing)
1: Ready
RO
FMR01 ^{CPU rewrite mode select bit (1) 0: Disables CPU rewrite mode}
(Disables software command)
RW
1: Enables CPU rewrite mode
(Enables software commands)
FMR02
Block 0, 1 rewrite enable bit (2) Set write protection for user ROM area
(see Table 20.4)
RW
FMSTP ^{Flash memory stop bit (3, 5)}
0: Starts flash memory operation
1: Stops flash memory operation
(Enters low-power consumption state _RW
and flash memory reset)
(b5-b4)
Reserved bit
Set to 0
RW
FMR06
Program status flag
(4)
0: Successfully completed
1: Completion error
RO
FMR07 Erase status flag
(4)
0: Successfully completed
1: Completion error
RO
NOTES:
1. Set the FMR01 bit to 1 immediately after setting it first to 0. Do not generate an interrupt or a DMA
transfer between setting the bit to 0 and setting it to 1. Set this bit while the P85/NMI/SD pin is held “H”
when selecting the NMI function. Set by program in a space other than the flash memory in EW mode
0. Set this bit to read alley mode and 0.
2. Set this bit to 1 immediately after setting it first to 0 while the FMR01 bit is set to 1. Do not generate an
interrupt or a DMA transfer between setting this bit to 0 and setting it to 1.
3. Set this bit in a space other than the flash memory by program. When this bit is set to 1, access to
flash memory will be denied. To set this bit to 0 after setting it to 1, wait for 10 usec. or more after
setting it to 1. To read data from flash memory after setting this bit to 0, maintain tps wait time before
accessing flash memory.
4. This bit is set to 0 by executing the clear status command.
5. This bit is enabled when the FMR01 bit is set to 1 (CPU rewrite mode). If the FMR01 bit is set to 0, this
bit can be set to 1 by writing 1 to the FMR01 bit. However, the flash memory does not enter low-power
consumption status and it is not initialized.
Flash Memory Control Register 1
b7 b6 b5 b4 b3 b2 b1 b0
0
Symbol
FMR1
Address
01B516
After Reset
000XXX0X 2
Bit Symbol
Bit Name
(b0) ^{Reserved bit}
Function
RW
When read, the content is undefined
RO
FMR11
(b3-b2)
(b4)
(b5)
FMR16
FMR17
EW mode 1 select bit ⁽¹⁾
Reserved bit
0: EW mode 0
1: EW mode 1
When read, the content is undefined
Nothing is assigned. If necessary, set to 0.
When read, the content is undefined
Reserved bit
Set to 0
Block 0 to 5 rewrite enable
bit ⁽²⁾
Block A, B access wait bit ⁽³⁾
Set write protection for user ROM
space (see Table 20.4)
0: Disable
1: Enable
0: PM17 enabled
1: With wait state (1 wait)
RW
RO
RW
RW
RW
NOTES:
1. Set the FMR11 bit to 1 immediately after setting it first to 0 while the FMR01 bit is set to 1. Do not
generate an interrupt or a DMA transfer between setting the bit to 0 and setting it to 1. Set this bit while
the P85/NMI/SD pin is held "H" when the NMI function is selected. If the FMR01 bit is set to 0, the FMR01
bit and FMR11 bit are both set to 0.
2. Set this bit to 1 immediately after setting it first to 0 while the FMR01 bit is set to 1. Do not generate an
interrupt or a DMA transfer between setting this bit to 0 and setting it to 1.
3. When rewriting more than 100 times, set this bit to 1 (with wait state). When the FMR17 bit is set to1(with
wait state), regardless of the PM17 bit setting, 1 wait state is inserted when accessing to blocks A and B.
The PM17 bit setting is enabled, regardless of the FMR17 bit setting, as to the access to other block and
the internal RAM.
Figure 20.6 FMR0 and FMR1 Registers
Rev. 1.12 Mar.30, 2007 ^{page 341} of 458
REJ09B0101-0112