M16C29 Datasheet, PDF (472/499 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/Tiny SERIES

M16C/29 Group
22. Usage Notes
22.15 Flash Memory Version
22.15.1 Functions to Inhibit Rewriting Flash Memory Rewrite
ID codes are stored in addresses 0FFFDF16, 0FFFE316, 0FFFEB16, 0FFFEF16, 0FFFF316, 0FFFF716,
and 0FFFFB16. If wrong data are written to theses addresses, the flash memory cannot be read or written
in standard serial I/O mode.
The ROMCP register is mapped in address 0FFFFF16. If wrong data is written to this address, the flash
memory cannot be read or written in parallel I/O mode.
In the flash memory version of MCU, these addresses are allocated to the vector addresses ("H") of fixed
vectors. The b3 to b0 in address 0FFFFF16 are reserved bits. Set these bits to 11112.
22.15.2 Stop Mode
When the MCU enters stop mode, execute the instruction which sets the CM10 bit to 1 (stop mode) after
setting the FMR01 bit to 0 (CPU rewrite mode disabled) and disabling the DMA transfer.
22.15.3 Wait Mode
When the MCU enters wait mode, excute the WAIT instruction after setting the FMR01 bit to 0 (CPU
rewrite mode disabled).
22.15.4 Low PowerDissipation Mode, On-Chip Oscillator Low Power Dissipation Mode
If the CM05 bit is set to 1 (main clock stop), the following commands must not be executed.
• Program
• Block erase
22.15.5 Writing Command and Data
Write the command code and data at even addresses.
22.15.6 Program Command
Write xx4016 in the first bus cycle and write data to the write address in the second bus cycle, and an auto
program operation (data program and verify) will start. Make sure the address value specified in the first
bus cycle is the same even address as the write address specified in the second bus cycle.
22.15.7 Operation Speed
When CPU clock source is main clock, before entering CPU rewrite mode (EW mode 0 or 1), select 10
MHz or less for BCLK using the CM06 bit in the CM0 register and bits CM17 to CM16 in the CM1 register.
Also, when CPU clock is f3(ROC) on-chip oscillator clock, before entering CPU rewrite mode (EW mode
0 or 1), set the ROCR3 to ROCR2 bits in the ROCR register to “divied by 4” or “divide by 8”.
On both cases, set the PM17 bit in the PM1 register to 1 (with wait state).
22.15.8 Instructions Inhibited Against Use
The following instructions cannot be used in EW mode 0 because the flash memory’s internal data is
referenced: UND instruction, INTO instruction, JMPS instruction, JSRS instruction, and BRK instruction
Rev. 1.12 Mar.30, 2007 ^{page 448} of 458
REJ09B0101-0112