M16C29 Datasheet, PDF (199/499 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/Tiny SERIES

M16C/29 Group
14. Serial I/O
UARTi Transmit/receive Mode Register (i=0, 1)
b7 b6 b5 b4 b3 b2 b1 b0
0
Symbol
U0MR, U1MR
Address
03A016, 03A816
After Reset
0016
Bit
Symbol
Bit Name
Function
RW
SMD0
Serial I/O mode select bit
(2)
b2 b1 b0
0 0 0 : Serial I/O disabled
RW
0 0 1 : Clock synchronous serial I/O mode
SMD1
1 0 0 : UART mode transfer data 7 bit long
RW
1 0 1 : UART mode transfer data 8 bit long
SMD2
1 1 0 : UART mode transfer data 9 bit long
Do not set the value other than the above
RW
CKDIR Internal/external clock
0 : Internal clock
RW
select bit
1 : External clock ⁽¹⁾
STPS _{Stop bit length select bit} 0 : One stop bit
1 : Two stop bits
RW
PRY Odd/even parity select bit Effective when PRYE = 1
0 : Odd parity
RW
1 : Even parity
PRYE Parity enable bit
0 : Parity disabled
RW
1 : Parity enabled
(b7) ^{Reserve bit}
Set to 0
RW
NOTES:
1. Set the corresponding port direction bit for each CLKi pin to 0 (input mode).
2. To receive data, set the corresponding port direction bit for each RxDi pin to 0.
UART2 Transmit/receive Mode Register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol Address
U2MR 037816
After Reset
0016
Bit
Symbol
Bit Name
Function
RW
SMD0
Serial I/O mode select bit
(2)
b2 b1 b0
0 0 0 : Serial I/O disabled
0 0 1 : Clock synchronous serial I/O mode
RW
SMD1
0 1 0 : I²C bus mode(3)
1 0 0 : UART mode transfer data 7 bit long
RW
SMD2
1 0 1 : UART mode transfer data 8 bit long
1 1 0 : UART mode transfer data 9 bits long
RW
Do not set the value other than the above
CKDIR Internal/external clock
select bit
0 : Internal clock
1 : External clock ⁽¹⁾
RW
STPS Stop bit length select bit
0 : One stop bit
1 : Two stop bits
RW
PRY Odd/even parity select bit Effective when PRYE = 1
0 : Odd parity
RW
1 : Even parity
PRYE Parity enable bit
0 : Parity disabled
1 : Parity enabled
RW
IOPOL ^{TxD, RxD I/O polarity}
reverse bit
0 : No reverse
1 : Reverse
RW
NOTES:
1. Set the corresponding port direction bit for each CLK2 pin to 0 (input mode).
2. To receive data, set the corresponding port direction bit for each RxD2 pin to 0 (input mode).
3. Set the corresponding port direction bit for SCL2 and SDA2 pins to 0 (input mode).
Figure 14.5 U0MR to U2MR Registers
Rev. 1.12 Mar.30, 2007 ^{page 175} of 458
REJ09B0101-0112