M16C29 Datasheet, PDF (197/499 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/Tiny SERIES

M16C/29 Group
14. Serial I/O
RxD2
No reverse
RxD data
reverse circuit
Reverse
IOPOL=0
IOPOL=1
1SP
STPS=0
SP
SP
2SP ^STPS=1
PAR
disabled
Clock
synchronous
PRYE=0 type
PAR
PAR ^PRYE=1 UART
enabled
Clock
synchronous type
UART
(7 bits)
UART
(8 bits)
UART(7 bits)
UART
(9 bits)
Clock
synchronous type
UART
(8 bits)
UART
(9 bits)
UARTi receive register
0 0 0 0 0 0 0 D8
D7 D6 D5 D4 D3 D2 D1 D0
Logic reverse circuit + MSB/LSB conversion circuit
UART2 receive
buffer register
Address 037E16
Address 037F16
Data bus high-order bits
PAR
2SP ^{STPS=1 enabled} PRYE=1 ^UART
SP
SP
PAR
1SP
STPS=0
PRYE=0 Clock
synchronous
type
PAR
disabled
0
Data bus low-order bits
Logic reverse circuit + MSB/LSB conversion circuit
D8
UART
(9 bits)
D7 D6 D5 D4 D3 D2 D1 D0
UART
(8 bits)
UART
(9 bits)
Clock
synchronous type
UART2 transmit
buffer register
Address 037A16
Address 037B16
UART
(7 bits)
UART
(8 bits)
Clock
synchronous type
UART(7 bits)
UARTi transmit register
Error signal output
U2ERE disable
=0
U2ERE
=1
Error signal
output circuit
Error signal output
enable
IOPOL ^{No reverse}
=0
TxD data
reverse circuit
IOPOL
=1
Reverse
SP: Stop bit
PAR: Parity bit
TxD2
SMD2 to SMD0, STPS, PRYE, IOPOL, CKDIR : Bits in the U2MR register
U2ERE : Bits in the U2C1 register
Figure 14.3 Block diagram of UART2 transmit/receive unit
Rev. 1.12 Mar.30, 2007 ^{page 173} of 458
REJ09B0101-0112