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M16C29 Datasheet, PDF (293/499 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/Tiny SERIES
M16C/29 Group
16. MULTI-MASTER I2C bus INTERFACE
16.5 I2C0 Status Register (S10 register)
The S10 register monitors the I2C bus interface status. When using the S10 register to check the status,
use the 6 low-order bits for read only.
16.5.1 Bit 0: Last Receive Bit (LRB)
The LRB bit stores the last bit value of received data. It can also be used to confirm whether ACK is
received. If the ACK-CLK bit in the S20 register is set to 1 (with ACK clock) and ACK is returned when the
ACK clock is generated, the LRB bit is set to 0. If ACK is not returned, the LRB bit is set to 1. When the
ACK-CLK bit is set to 0 (no ACK clock), the last bit value of received data is input. When writing data to
the S00 register, the LRB bit is set to 0.
16.5.2 Bit 1: General Call Detection Flag (ADR0)
When the ALS bit in the S1D0 register is set to 0 (addressing format), this ADR0 flag is set to 1 by
receiving the general calls(1),whose address data are all 0, in slave mode.
The ADR0 flag is set to 0 when STOP or START conditions is detected or when the IHR bit in the S1D0
register is set to 1 (reset).
NOTE:
1. General call: A master device transmits the general call address 0016 to all slaves. When the
master device transmits the general call, all slave devices receive the controlled data after general
call.
16.5.3 Bit 2: Slave Address Comparison Flag (AAS)
The AAS flag indicates a comparison result of the slave address data after enabled by setting the ALS bit
in the S1D0 register to 0 (addressing format).
The AAS flag is set to 1 when the 7 bits of the address data are matched with the slave address stored
into the S0D0 register, or when a general call is received, in slave receive mode. The AAS flag is set to
0 by writing data to the S00 register. When the ES0 bit in the S1D0 register is set to 0 (I2C bus interface
disabled) or when the IHR bit in the S1D0 register is set to 1 (reset), the AAS flag is also set to 0.
16.5.4 Bit 3: Arbitration Lost Detection Flag (AL)(1)
In master transmit mode, if an "L" signal is applied to the SDA pin by other than the MCU, the AL flag is set
to 1 by determining that the arbitration is los and the TRX bit in the S10 register is set to 0 (receive mode)
at the same time. The MST bit in the S10 register is set to 0 (slave mode) after transferring the bytes
which lost the arbitration.
The arbitration lost can be detected only in master transmit mode. When writing data to the S00 register,
the AL flag is set to 0. When the ES0 bit in the S1D0 register is set to 0 (I2C bus interface disabled) or
when the IHR bit in the S1D0 register is set to 1 (reset), the AL flag is set to 0.
NOTE:
1. Arbitration lost: communication disabled as a master
Rev. 1.12 Mar.30, 2007 page 269 of 458
REJ09B0101-0112