M16C29 Datasheet, PDF (269/499 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/Tiny SERIES

M16C/29 Group
15. A/D Converter
A/D Control Register 0 ⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
0 00111
Symbol
ADCON0
Address
03D616
After Reset
00000XXX 2
Bit Symbol
Bit Name
Function
RW
CH0
Analog input pin
select bit
b2 b1 b0
1 1 1: Set to 111b in delayed trigger
mode 0
RW
CH1
RW
CH2
RW
MD0
MD1
TRG
ADST
CKS0
A/D operation mode
select bit 0
Trigger select bit
A/D conversion start flag
(2)
Frequency select bit 0
b4 b3
0 0: One-shot mode or delayed trigger mode
0,1
Refer to Table 15.11
0: A/D conversion disabled
1: A/D conversion started
Refer to Table 15.2
RW
RW
RW
RW
RW
NOTES:
1. If the ADCON0 register is rewritten during A/D conversion, the conversion result will be undefined.
2. Do not write 1 in delayed trigger mode 0. When write, set to 0.
A/D Control Register 1 ⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
1
0
Symbol
ADCON1
Address
03D716
After Reset
0016
Bit Symbol
Bit Name
SCAN0
A/D sweep pin
select bit ⁽²⁾
SCAN1
MD2
BITS
CKS1
A/D operation mode
select bit 1
8/10-bit mode select bit
Frequency select bit 1
Function
When selecting delayed trigger sweep mode 0
b1 b0
0 0: AN0 to AN1 (2 pins)
0 1: AN0 to AN3 (4 pins)
1 0: AN0 to AN5 (6 pins)
1 1: AN0 to AN7 (8 pins)
0: Any mode other than repeat sweep
mode 1
0: 8-bit mode
1: 10-bit mode
Refer to Table 15.2
RW
RW
RW
RW
RW
RW
VCUT
Vref connect bit ⁽³⁾
1: Vref connected
RW
(b7-b6)
Nothing is assigned. If necessary, set to 0.
When read, its content is 0
NOTES:
1. If the ADCON1 register is rewritten during A/D conversion, the conversion result will be undefined.
2. AN00 to AN07, AN20 to AN27, and AN30 to AN32 can be used in the same way as AN 0 to AN7. Use bits ADGSEL1 and
ADGSEL0 in the ADCON2 register to select the desired pin.
3. If the VCUT bit is reset from 0 (Vref unconnected) to 1 (Vref connected), wait for 1 µs or more before starting
A/D conversion.
A/D Control Register 2 ⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
00
1
Symbol
ADCON2
Address
03D416
After Reset
0016
Bit Symbol
Bit Name
SMP
A/D conversion method
select bit ⁽²⁾
ADGSEL0 A/D input group
select bit
ADGSEL1
(b3)
Reserved bit
Function
1: With sample and hold
b2 b1
0 0: Select port P10 group
0 1: Select port P9 group
1 0: Select port P0 group
1 1: Select port P1/P9 group
Set to 0
CKS2
Frequency select bit 2 Refer to Table 15.2
RW
RW
RW
RW
RW
RW
TRG1
Trigger select bit 1
Refer to Table 15.11
RW
(b7-b6)
Nothing is assigned. If necessary, set to 0.
When read, its content is 0
NOTES:
1. If the ADCON2 register is rewritten during A/D conversion, the conversion result will be undefined.
2. Set to 1 in delayed trigger mode 0.
Figure 15.22 ADCON0 to ADCON2 Registers in Delayed Trigger Mode 0
Rev. 1.12 Mar.30, 2007 ^{page 245} of 458
REJ09B0101-0112