M16C29 Datasheet, PDF (109/499 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/Tiny SERIES

M16C/29 Group
9. Interrupts
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9.6 INT Interrupt
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INTi interrupt (i=0 to 5) is triggered by the edges of external inputs. The edge polarity is selected using the
IFSRi bit in the IFSR register.
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The INT5 input has an effective digital debounce function for a noise rejection. Refer to "19.6 Digital
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Debounce function" for this detail. When using INT5 interrupt to exit stop mode, set the P17DDR register
to FF16 before entering stop mode.
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________
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To use the INT4 interrupt, set the IFSR6 bit in the IFSR register to 1 (INT4). To use the INT5 interrupt, set
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the IFSR7 bit in the IFSR register to 1 (INT5).
After modifiying bit IFSR6 or IFSR7, clear the corresponding IR bit to 0 (interrupt not requested) before
enabling the interrupt.
Figure 9.11 shows the IFSR registers.
Interrupt Request Cause Select Register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
IFSR
Address
035F16
After Reset
0016
Bit Symbol
Bit Name
Function
RW
IFSR0
INT0 interrupt polarity
switching bit
0 : One edge
1 : Both edges (1)
RW
IFSR1
INT1 interrupt polarity
switching bit
0 : One edge
1 : Both edges (1)
RW
IFSR2 INT2 interrupt polarity
0 : One edge
switching bit
1 : Both edges (1)
RW
IFSR3
INT3 interrupt polarity
switching bit
0 : One edge
1 : Both edges ⁽¹⁾
RW
IFSR4 INT4 interrupt polarity
0 : One edge
switching bit
1 : Both edges (1)
RW
IFSR5 INT5 interrupt polarity
0 : One edge
switching bit
1 : Both edges ⁽¹⁾
RW
IFSR6
Interrupt request cause
select bit
0 : SI/O3 ₍₂₎
1 : INT4
RW
IFSR7
Interrupt request cause
select bit
0 : SI/O4 (2)
1 : INT5
RW
NOTES:
1. When setting this bit to 1 (both edges), make sure the POL bit in registers INT0IC to INT5IC is set to
0 (falling edge).
2. When setting this bit to 0 (SI/O3, SI/O4), make sure the POL bit in registers S3IC and S4IC is set to
0 (falling edge).
Figure 9.11 IFSR Register
Rev. 1.12 Mar.30, 2007
REJ09B0101-0112
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