M16C29 Datasheet, PDF (467/499 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/Tiny SERIES

M16C/29 Group
22. Usage Notes
fCAN
CPU read signal
Updating period of
CAN module
CPU reset signal
C0STR register
b8: State_Reset bit
0: CAN operation
mode
1: CAN reset/initial-
ization mode
✕
✕
✕
✕
✕
✕: When the CAN module’s State_Reset bit updating period matches the CPU’s read
period, it does not enter reset mode, for the CPU read has the higher priority.
Figure 22.5 When Updating Period of CAN Module Matches Access Period from CPU
CPU read signal
Updating period of
the CAN module
CPU reset signal
C0STR register
b8: State_Reset bit
0: CAN operation
mode
1: CAN reset/initial-
ization mode
Wait time
: Updated without fail in period of 3fCAN
Figure 22.6 With a Wait Time of 3fCAN Before CPU Read
CPU read signal
Updating period of
the CAN module
CPU reset signal
C0STR register
b8: State_Reset bit
0: CAN operation
mode
1: CAN reset/initial-
ization mode
4fCAN
✕
✕: When the CAN module’s State_Reset bit updating period matches the CPU’s read
period, it does not enter reset mode, for the CPU read has the higher priority.
: Updated without fail in period of 4fCAN
Figure 22.7 When Polling Period of CPU is 3fCAN or Longer
Rev. 1.12 Mar.30, 2007 ^{page 443} of 458
REJ09B0101-0112