M16C29 Datasheet, PDF (61/499 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/Tiny SERIES

M16C/29 Group
VCC
ROC
RESET
td(P-R) More than
td(ROC)
CPU clock
Address
Max. 2 ms
CPU clock: 28 cycles
FFFFC16
Content of reset vector
FFFFE16
Figure 5.2 Reset Sequence
____________
Table 5.1 Pin Status When RESET Pin Level is “L”
Pin name
Status
P0 to P3,
P6 to P10
Input port (high impedance)
5. Resets
b15
000016
000016
000016
000016
000016
000016
000016
b0
Data register(R0)
Data register(R1)
Data register(R2)
Data register(R3)
Address register(A0)
Address register(A1)
Frame base register(FB)
b19
b0
0000016
Content of addresses FFFFE16 to FFFFC16
b15
b0
000016
000016
000016
b15
b0
000016
b15
b8 b7
b0
IPL
U I OB S Z D C
Interrupt table register(INTB)
Program counter(PC)
User stack pointer(USP)
Interrupt stack pointer(ISP)
Static base register(SB)
Flag register(FLG)
Figure 5.3 CPU Register Status After Reset
Rev. 1.12 Mar.30, 2007
REJ09B0101-0112
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