M16C29 Datasheet, PDF (101/499 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/Tiny SERIES

M16C/29 Group
9. Interrupts
Interrupt Request Cause Select Register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
IFSR
Address
035F16
After Reset
0016
Bit Symbol
Bit Name
Function
RW
IFSR0
INT0 interrupt polarity
switching bit
0 : One edge
1 : Both edges (1)
RW
IFSR1
INT1 interrupt polarity
switching bit
0 : One edge
1 : Both edges (1)
RW
IFSR2
INT2 interrupt polarity
switching bit
0 : One edge
1 : Both edges (1)
RW
IFSR3
INT3 interrupt polarity
switching bit
0 : One edge
1 : Both edges ⁽¹⁾
RW
IFSR4 INT4 interrupt polarity
0 : One edge
switching bit
1 : Both edges (1)
RW
IFSR5 INT5 interrupt polarity
0 : One edge
switching bit
1 : Both edges ⁽¹⁾
RW
IFSR6
Interrupt request cause
select bit
0 : SI/O3 ₍₂₎
1 : INT4
RW
IFSR7
Interrupt request cause
select bit
0 : SI/O4 (2)
1 : INT5
RW
NOTES:
1. When setting this bit to 1 (both edges), make sure the POL bit in registers INT0IC to INT5IC is set to
0 (falling edge).
2. When setting this bit to 0 (SI/O3, SI/O4), make sure the POL bit in registers S3IC and S4IC is set to
0 (falling edge).
Interrupt Request Cause Select Register 2
b7 b6 b5 b4 b3 b2 b1 b0
0
Symbol
IFSR2A
Address
035E16
After reset
00XXX0002
Bit Symbol
Bit Name
IFSR20 Reserved bit
Function
RW
Set to 0
RW
IFSR21
Interrupt request cause
select bit
0: A/D conversion
1: Key input
RW
IFSR22
Interrupt request cause
select bit
0: CAN0 wakeup/error
1: Do not set
RW
(b5-b3)
Nothing is assigned. If necessary, set to 0.
When read, the contents are undefined
IFSR26
Interrupt request cause
select bit
0: IC/OC base timer
1: SCL/SDA
RW
IFSR27
Interrupt request cause
select bit
0: IC/OC interrupt 1
1: I²C bus interface
RW
Figure 9.4 IFSR Register and IFSR2A Register
Rev. 1.12 Mar.30, 2007
REJ09B0101-0112
page 77 _{of 458}