M16C29 Datasheet, PDF (112/499 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/Tiny SERIES

M16C/29 Group
9. Interrupts
Table 9.6 PC Value Saved in Stack Area When Address Match Interrupt Request Is Acknowledged
Instruction at the address indicated by the RMADi register
Value of the PC that is
saved to the stack area
• 2-byte op-code instruction
• 1-byte op-code instructions which are followed:
ADD.B:S #IMM8,dest SUB.B:S #IMM8,dest
AND.B:S #IMM8,dest
OR.B:S
#IMM8,dest MOV.B:S #IMM8,dest
STZ.B
#IMM8,dest
STNZ.B #IMM8,dest STZX.B #IMM81,#IMM82,dest
CMP.B:S #IMM8,dest PUSHM src
POPM dest
JMPS
#IMM8
JSRS
#IMM8
MOV.B:S #IMM,dest (However, dest=A0 or A1)
Instructions other than the above
The address
indicated by the
RMADi register +2
The address
indicated by the
RMADi register +1
Value of the PC that is saved to the stack area : Refer to “Saving Registers”.
Op-code is an abbreviation of Operation Code. It is a portion of instruction code.
Refer to Chapter 4 Instruction Code/Number of Cycles in M16C/60, M16C/20 Series Software Manual. Op-code is shown
as a bold-framed figure directly below the Syntax.
Table 9.7 Relationship Between Address Match Interrupt Sources and Associated Registers
Address match interrupt sources Address match interrupt enable bit Address match interrupt register
Address match interrupt 0
AIER0
RMAD0
Address match interrupt 1
AIER1
RMAD1
Address Match Interrupt Enable Register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
AIER
Address
000916
After Reset
XXXXXX00 2
Bit Symbol
Bit Name
Function
RW
AIER0
Address match interrupt 0
enable bit
0 : Interrupt disabled
1 : Interrupt enabled
RW
AIER1 Address match interrupt 1 0 : Interrupt disabled
enable bit
1 : Interrupt enabled
RW
(b7-b2)
Nothing is assigned. If necessary, set to 0.
When read, the content is undefined
Address Match Interrupt Register i (i = 0 to 1)
(b23)
b7
(b19)
b3
(b16)(b15)
b0 b7
(b8)
b0 b7
b0 ^Symbol
RMAD0
RMAD1
Address
001216 to 001016
001616 to 001416
After Reset
X00000 16
X00000 16
Function
Address setting register for address match interrupt
Nothing is assigned. If necessary, set to 0.
When read, the content is undefined
Setting Range
RW
0000016 to FFFFF16 RW
Figure 9.14 AIER Register, RMAD0 and RMAD1 Registers
Rev. 1.12 Mar.30, 2007
REJ09B0101-0112
page 88 _{of 458}