M16C29 Datasheet, PDF (117/499 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/Tiny SERIES

M16C/29 Group
11. DMAC
DMA0 Request Cause Select Register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
DM0SL
Address
03B816
After Reset
0016
Bit Symbol
Bit Name
Function
RW
DSEL0
RW
DSEL1 _{DMA request cause}
Refer to note (1)
RW
DSEL2 ^{select bit}
RW
DSEL3
RW
(b5-b4)
Nothing is assigned. When write, set to 0.
When read, their content are 0
DMS
DMA request cause
expansion select bit
0: Basic cause of request
1: Extended cause of request
RW
DSR
A DMA request is generated by
Software DMA request
bit
setting this bit to 1 when the DMS bit
is 0 (basic cause) and bits DSEL3 to
DSEL0 are 00012 (software trigger).
RW
The value of this bit when read is 0
NOTE:
1. The causes of DMA0 requests can be selected by a combination of DMS bit and bits DSEL3 to DSEL0 in the
manner described below.
DSEL3 to DSEL0
0 0 0 02
0 0 0 12
0 0 1 02
0 0 1 12
0 1 0 02
0 1 0 12
0 1 1 02
0 1 1 12
1 0 0 02
1 0 0 12
1 0 1 02
1 0 1 12
1 1 0 02
1 1 0 12
1 1 1 02
1 1 1 12
DMS=0(basic cause of request)
Falling edge of INT0 pin
Software trigger
Timer A0
Timer A1
Timer A2
Timer A3
Timer A4
Timer B0
Timer B1
Timer B2
UART0 transmit
UART0 receive
UART2 transmit
UART2 receive
A/D conversion
UART1 transmit
Figure 11.2 DM0SL Register
DMS=1(extended cause of request)
IC/OC base timer
–
IC/OC channel 0
IC/OC channel 1
–
–
Two edges of INT0 pin
–
–
–
IC/OC channel 2
IC/OC channel 3
IC/OC channel 4
IC/OC channel 5
IC/OC channel 6
IC/OC channel 7
Rev. 1.12 Mar.30, 2007
REJ09B0101-0112
page 93 _{of 458}