MC68HC705JP7 Datasheet, PDF (82/242 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Operating Modes
Freescale Semiconductor, Inc.
6.4.3 Halt Mode
The STOP instruction puts the MCU in halt mode if selected by the
SWAIT bit in the MOR. Halt mode is identical to wait mode, except that
a variable recovery delay occurs when the MCU exits halt mode. A
recovery time of from 1 to 16 or from 1 to 4064 internal bus cycles can
be selected by the DELAY bit in the MOR.
If the SWAIT bit is set in the MOR to put the MCU in halt mode, the COP
watchdog cannot be turned off inadvertently by a STOP instruction.
6.4.4 Data-Retention Mode
In the data-retention mode, the MCU retains random-access memory
(RAM) contents and CPU register contents at V_DD voltages as low as 2.0
Vdc. The data retention feature allows the MCU to remain in a low-power
consumption state during which it retains data, but the CPU cannot
execute instructions. Current consumption in this mode is not tested.
To put the MCU in the data retention mode:
1. Drive the RESET pin to a logic 0.
2. Lower the V_DD voltage. The RESET pin must remain low
continuously during data retention mode.
To take the MCU out of the data retention mode:
1. Return V_DD to normal operating voltage.
2. Return the RESET pin to a logic 1.
Advance Information
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MC68HC705JJ7 • MC68HC705JP7 — REV 4
Operating Modes
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