MC68HC705JP7 Datasheet, PDF (38/242 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Memory
Freescale Semiconductor, Inc.
Addr.
$0000
$0001
$0002
$0003
$0004
$0005
$0006
$0007
Register
Bit 7
6
5
4
3
2
1
Bit 0
Port A Data Register ^{Read: 0}
(PORTA) Write:
See page 85. _Reset:
0
PA5 PA4 PA3 PA2 PA1 PA0
Unaffected by reset
Port B Data Register ^Read: _PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
(PORTB) Write:
See page 90. _Reset:
Unaffected by reset
Port C⁽¹⁾ Data Register ^Read: _PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
(PORTC) Write:
See page 102. _Reset:
Unaffected by reset
Analog Multiplex Register ^Read: _{HOLD DHOLD INV}
(AMUX) Write:
See page 110. _{Reset: 1}
0
0
VREF MUX4 MUX3 MUX2 MUX1
0
0
0
0
0
Data Direction Register A ^{Read: 0}
(DDRA) Write:
See page 86. _{Reset: 0}
0
DDRA5 DDRA4 DDRA3 DDRA2 DDRA1 DDRA0
0
0
0
0
0
0
0
Data Direction Register B ^Read: _DDRB7
(DDRB) Write:
See page 91. _{Reset: 0}
DDRB6
0
DDRB5
0
DDRB4
0
DDRB3
0
DDRB2
0
DDRB1
0
DDRB0
0
Data Direction Register C ^Read: _DDRC7
(DDRC) Write:
See page 103. _{Reset: 0}
DDRC6
0
DDRC5
0
DDRC4
0
DDRC3
0
DDRC2
0
DDRC1
0
DDRC0
0
Unimplemented
$0008
Core Timer Status and Control Read:
Register (CTSCR)
See page 153.
Write:
Reset:
CTOF
0
RTIF
CTOFE
0
0
$0009
Core Timer Counter Register ^{Read: Bit 7}
6
5
(CTCR) Write:
See page 155. _{Reset: 0}
0
0
= Unimplemented
1. Features related to port C are only available on the 28-pin MC68HC705JP7 devices.
0
0
RTIE
RT1 RT0
CTOFR RTIFR
0
0
0
1
1
4
3
2
1
Bit 0
0
0
0
0
0
R = Reserved U = Unaffected
Figure 2-3. Register Summary (Sheet 1 of 4)
Advance Information
38
MC68HC705JJ7 • MC68HC705JP7 — REV 4
Memory
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