MC68HC705JP7 Datasheet, PDF (170/242 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Programmable Timer
11.7 Timer Control Register
The timer control register (TCR) shown in Figure 11-10, performs the
following functions:
• Enables input capture interrupts
• Enables output compare interrupts
• Enables timer overflow interrupts
• Controls the active edge polarity of the TCAP signal
• Controls the active level of the TCMP output
Reset clears all the bits in the TCR with the exception of the IEDG bit
which is unaffected.
Address: $0012
Bit 7
6
5
4
3
2
1
Bit 0
Read:
0
0
0
ICIE OCIE TOIE
IEDG OLVL
Write:
Reset: 0
0
0
0
0
0
U
0
= Unimplemented
U = Unaffected
Figure 11-10. Timer Control Register (TCR)
ICIE — Input Capture Interrupt Enable Bit
This read/write bit enables interrupts caused by an active signal on
the TCAP pin or from CPF2 flag bit of the analog subsystem voltage
comparator 2. Reset clears the ICIE bit.
1 = Input capture interrupts enabled
0 = Input capture interrupts disabled
OCIE — Output Compare Interrupt Enable Bit
This read/write bit enables interrupts caused by an active match of the
output compare function. Reset clears the OCIE bit.
1 = Output compare interrupts enabled
0 = Output compare interrupts disabled
Advance Information
170
MC68HC705JJ7 • MC68HC705JP7 — REV 4
Programmable Timer
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