MC68HC705JP7 Datasheet, PDF (102/242 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Parallel Input/Output
7.5.1 Port C Data Register
The port C data register (PORTC) contains a bit for each of the port C
pins. When a port C pin is programmed to be an output, the state of its
data register bit determines the state of the output pin. When a port C pin
is programmed to be an input, reading the port C data register returns
the logic state of the pin.
Address: $0002
Bit 7
6
5
4
3
2
1
Bit 0
Read:
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
Write:
Reset:
Unaffected by reset
Figure 7-13. Port C Data Register (PORTC)
PC7–PC0 — Port C Data Bits
These read/write bits are software programmable. Data direction of
each bit is under the control of the corresponding bit in the port C data
direction register (DDRC). Reset has no effect on port C data.
7.5.2 Data Direction Register C
The contents of the port C data direction register (DDRC) determine
whether each port C pin is an input or an output. Writing a logic 1 to a
DDRC bit enables the output buffer for the associated port C pin. A
DDRC bit set to a logic 1 also disables the pulldown device for that pin.
Writing a logic 0 to a DDRC bit disables the output buffer for the
associated port C pin. A reset initializes all DDRC bits to logic 0s,
configuring all port C pins as inputs.
Advance Information
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MC68HC705JJ7 • MC68HC705JP7 — REV 4
Parallel Input/Output
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