MC68HC705JP7 Datasheet, PDF (48/242 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Central Processor Unit (CPU)
3.6 Program Counter
The program counter is a 16-bit register that contains the address of the
next instruction or operand to be fetched as shown in Figure 3-5. The
three most significant bits of the program counter are ignored internally
and appear as 111 during stacking and subroutine calls.
Normally, the address in the program counter automatically increments
to the next sequential memory location every time an instruction or
operand is fetched. Jump, branch, and interrupt operations load the
program counter with an address other than that of the next sequential
location.
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2
Read:
111
Write:
Reset: 0 0 0
Loaded with vector from $1FFE and $1FFF
Figure 3-5. Program Counter (PC)
Bit
10
3.7 Condition Code Register
The condition code register is an 8-bit register whose three most
significant bits are permanently fixed at 111 as shown in Figure 3-6. The
condition code register contains the interrupt mask and four flags that
indicate the results of the instruction just executed. The following
paragraphs describe the functions of the condition code register.
Bit 7
6
5
4
3
2
1
Bit 0
Read:
1
1
1
H
I
N
C
Z
Write:
Reset: 1
1
1
U
1
U
U
U
U = Unaffected
Figure 3-6. Condition Code Register (CCR)
Advance Information
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MC68HC705JJ7 • MC68HC705JP7 — REV 4
Central Processor Unit (CPU)
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