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MC68HC705JP7 Datasheet, PDF (172/242 Pages) Motorola, Inc – HCMOS Microcontroller Unit
Freescale Semiconductor, Inc.
Programmable Timer
Writing to any of the bits in the TSR has no effect. Reset does not
change the state of any of the flag bits in the TSR.
Address: $0013
Bit 7
6
5
4
3
2
1
Bit 0
Read: ICF
OCF
TOF
0
0
0
0
0
Write:
Reset: U
U
U
0
0
0
0
0
= Unimplemented
U = Unaffected
Figure 11-11. Timer Status Register (TSR)
ICF — Input Capture Flag
The ICF bit is automatically set when an edge of the selected polarity
occurs on the TCAP pin. Clear the ICF bit by reading the timer status
register with the ICF set, and then reading the low byte (ICRL, $0015)
of the input capture registers. Resets have no effect on ICF.
OCF — Output Compare Flag
The OCF bit is automatically set when the value of the timer registers
matches the contents of the output compare registers. Clear the OCF
bit by reading the timer status register with the OCF set and then
accessing the low byte (OCRL, $0017) of the output compare
registers. Resets have no effect on OCF.
TOF — Timer Overflow Flag
The TOF bit is automatically set when the 16-bit timer counter rolls
over from $FFFF to $0000. Clear the TOF bit by reading the timer
status register with the TOF set and then accessing the low byte
(TMRL, $0019) of the timer registers. Resets have no effect on TOF.
Advance Information
172
MC68HC705JJ7 • MC68HC705JP7 — REV 4
Programmable Timer
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