MC68HC705JP7 Datasheet, PDF (108/242 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Analog Subsystem
8.2 Introduction
The analog subsystem of the MC68HC705JJ7/MC68HC705JP7 is
based on two on-chip voltage comparators and a selectable current
charge/discharge function as shown in Figure 8-1.
This configuration provides several features:
• Two independent voltage comparators with external access to
both inverting and non-inverting inputs
• One voltage comparator can be connected as a single-slope
analog-to-digital (A/D) and the other connected as a
single-voltage comparator. The possible single-slope A/D
connection provides these features:
– A/D conversions can use V_DD or an external voltage as a
reference with software used to calculate ratiometric or
absolute results
– Channel access of up to four inputs via multiplexer control with
independent multiplexer control allowing mixed input
connections
– Access to V_DD and V_SS for calibration
– Divide by 2 to extend input voltage range
– Each comparator can be inverted to calculate input offsets.
– Internal sample and hold capacitor
– Direct digital output of comparator 1 to the PB4 pin
Voltages are resolved by measuring the time it takes an external
capacitor to charge up to the level of the unknown input voltage being
measured. The beginning of the A/D conversion time can be started by
several means:
• Output compare from the 16-bit programmable timer
• Timer overflow from the 16-bit programmable timer
• Direct software control via a register bit
Advance Information
108
MC68HC705JJ7 • MC68HC705JP7 — REV 4
Analog Subsystem
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