MC68HC705JP7 Datasheet, PDF (205/242 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Instruction Set
Instruction Set Summary
Source
Form
LDX #opr
LDX opr
LDX opr
LDX opr,X
LDX opr,X
LDX ,X
LSL opr
LSLA
LSLX
LSL opr,X
LSL ,X
LSR opr
LSRA
LSRX
LSR opr,X
LSR ,X
MUL
NEG opr
NEGA
NEGX
NEG opr,X
NEG ,X
NOP
ORA #opr
ORA opr
ORA opr
ORA opr,X
ORA opr,X
ORA ,X
ROL opr
ROLA
ROLX
ROL opr,X
ROL ,X
ROR opr
RORA
RORX
ROR opr,X
ROR ,X
RSP
Table 14-6. Instruction Set Summary (Sheet 5 of 7)
Operation
Description
Effect
on CCR
H I NZC
Load Index Register
with Memory Byte
X ←(M)
IMM AE ii 2
DIR BE dd 3
——   —
EXT
IX2
CE hh ll
DE ee ff
4
5
IX1 EE ff 4
IX FE
3
Logical Shift Left
(Same as ASL)
C
b7
0
b0
——   ⋅
DIR 38 dd 5
INH 48
3
INH 58
3
IX1 68 ff 6
IX 78
5
Logical Shift Right
Unsigned Multiply
Negate Byte
(Two’s Complement)
No Operation
Logical OR
Accumulator with
Memory
Rotate Byte Left
through Carry Bit
Rotate Byte Right
through Carry Bit
Reset Stack Pointer
0
b7
C
b0
X : A ←(X) × (A)
M ←–(M) = $00 – (M)
A ←–(A) = $00 – (A)
X ←–(X) = $00 – (X)
M ←–(M) = $00 – (M)
M ←–(M) = $00 – (M)
A ←(A) ∨ (M)
C
b7
b0
C
b7
b0
SP ←$00FF
DIR 34 dd 5
INH 44
3
— — 0   INH 54
3
IX1 64 ff 6
IX 74
5
0 — — — 0 INH 42
11
DIR 30 ii 5
INH 40
3
— —    INH 50
3
IX1 60 ff 6
IX 70
5
— — — — — INH 9D
2
IMM AA ii 2
DIR BA dd 3
——   —
EXT
IX2
CA hh ll
DA ee ff
4
5
IX1 EA ff 4
IX FA
3
DIR 39 dd 5
INH 49
3
— —    INH 59
3
IX1 69 ff 6
IX 79
5
DIR 36 dd 5
INH 46
3
— —    INH 56
3
IX1 66 ff 6
IX 76
5
— — — — — INH 9C
2
MC68HC705JJ7 • MC68HC705JP7 — REV 4
MOTOROLA
Instruction Set
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