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MC68HC705JP7 Datasheet, PDF (41/242 Pages) Motorola, Inc – HCMOS Microcontroller Unit
Freescale Semiconductor, Inc.
Memory
Input/Output Registers
Addr.
Register
Bit 7
$001C EPROM Programming Register Read: 0
(EPROG) Write:
See page 184. Reset: 0
$001D
Analog Counter Register Read: CHG
(ACR) Write:
See page 115. Reset: 0
$001E
Analog Status Register Read:
(ASR) Write:
See page 115. Reset:
CPF2
0
$001F
Reserved
R
↓
$1FEF
Reserved
R
6
5
4
3
2
1
Bit 0
0
0
0
0
ELAT MPGM EPGM
R
R
R
R
0
0
0
0
0
0
0
ATD2 ATD1 ICEN CPIE CP2EN CP1EN ISEN
0
CPF1
0
R
0
0
0
0
CPFR2 CPFR1
0
0
R
R
0
COE1
0
R
0
VOFF
0
R
0
CMP2
0
R
0
CMP1
R
0
R
R
R
R
R
R
R
R
$1FF0
COP and Security Register Read:
OPT
(COPR) Write: EPMSEC
See pages 43, 137, 156, and 188. Reset:
= Unimplemented
1. Features related to port C are only available on the 28-pin MC68HC705JP7 devices.
Unaffected by reset
R = Reserved
COPC
U = Unaffected
Figure 2-3. Register Summary (Sheet 4 of 4)
MC68HC705JJ7 • MC68HC705JP7 — REV 4
MOTOROLA
Memory
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