MC68HC705JP7 Datasheet, PDF (73/242 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Resets
Reset States
A reset, therefore, connects the negative input of comparator 2 to the
channel selection bus, which is switched to V_SS. Both comparators are
set up as non-inverting (a higher positive voltage on the positive input
results in a positive output) and both are powered down. The current
source and discharge device on the PB0/AN0 pin is disabled and
powered down. Any analog subsystem interrupt flags are cleared and
the analog interrupt is disabled. Direct drive by comparator 1 to the PB4
pin and the voltage offset to the sample capacitor are disabled (if both
are enabled by the OPT bit being set in the COPR).
5.6.8 External Oscillator and Internal Low-Power Oscillator
A reset presets the oscillator select bits (OM1 and OM2) in the interrupt
status and control register (ISCR) such that the device runs from the
internal oscillator (OM1 = 0, OM2 = 1) which has these effects on the
oscillators:
• The internal low-power oscillator is enabled and selected.
• The external oscillator is disabled.
• The CPU bus clock is driven from the internal low-power oscillator.
MC68HC705JJ7 • MC68HC705JP7 — REV 4
MOTOROLA
Resets
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