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MC68HC705JP7 Datasheet, PDF (126/242 Pages) Motorola, Inc – HCMOS Microcontroller Unit
Freescale Semiconductor, Inc.
Analog Subsystem
Table 8-4. A/D Conversion Parameters
Name
Function
VX Unknown voltage on channel selection bus
VMAX Maximum charging voltage on external capacitor
ICHG
Charging current on external ramping capacitor
VDD = 3 Vdc
VDD = 5 Vdc
IDIS Discharge current on external ramping capacitor
Min
Typ
Max
Units
VSS
—
VDD –1.5
V
—
—
VDD –1.5
V
Refer to 15.10 Analog Subsystem
Characteristics (5.0 Vdc) and 15.11 Analog
Subsystem Characteristics (3.0 Vdc)
Refer to 15.10 Analog Subsystem
Characteristics (5.0 Vdc) and 15.11 Analog
Subsystem Characteristics (3.0 Vdc)
tCHG
Time to charge external capacitor
(100 kHz < fOSC < 4.0 MHz)
4-bit result
6-bit result
8-bit result
10-bit result
12-bit result
tDIS Time to discharge external capacitor, CEXT
CEXT Capacitance of external ramping capacitor
N Number of counts for ICHG to charge CEXT to VX
Prescaler into timing function (÷ P)
P
Using core timer
Using 16-bit programmable timer
Using software loops
fOSC Clock source frequency (excluding any prescaling)
1. Limited by requirement for CEXT to be less than 2.0 µF
0.032
0.128
0.512
2.048
8.192
—
0.0001
1
0.128
0.512
2.048
8.196
32.768
5
0.1
1024
2.56
10.24
40.96
120(1)
120(1)
10
2.0
65536
ms
ms/ µF
µF
Counts
8
8
8
8
8
8
÷P
24
User defined User defined
Refer to 15.12 Control Timing (5.0 Vdc)
and 15.13 Control Timing (3.0 Vdc)
Advance Information
126
MC68HC705JJ7 • MC68HC705JP7 — REV 4
Analog Subsystem
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