MC68HC705JP7 Datasheet, PDF (43/242 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Memory
Erasable Programmable Read-Only Memory (EPROM)
2.7 Erasable Programmable Read-Only Memory (EPROM)
The EPROM is located in three areas of the memory map:
• Addresses $0700–$1EFF contain 6144 bytes of user EPROM.
• Addresses $1FF0–$1FF1 contain 2 bytes of EPROM reserved for
user vectors and COP and security register (COPR), and the mask
option register. Only bit 7 of $1FF0 is a programmable bit.
• Addresses $1FF2–$1FFF contain 14 bytes of interrupt vectors.
2.8 COP Register
As shown in Figure 2-5, a register location is provided at $1FF0 to set
the EPROM security⁽¹⁾, select the optional features, and reset the COP
watchdog timer. The OPT bit controls the function of the PB4 port pin
and the availability to add an offset to any measured analog voltages.
See 8.5 Analog Status Register for more information
Address: $1FF0
$1FF0 Bit 7
6
5
4
3
2
1
Read:
OPT
Write: EPMSEC
Reset:
Unaffected by reset
= Unimplemented
Figure 2-5. COP and Security Register (COPR)
Bit 0
COPC
1. No security feature is absolutely secure. However, Motorola’s strategy is to make reading or
copying the EPROM/OTPROM difficult for unauthorized users.
MC68HC705JJ7 • MC68HC705JP7 — REV 4
MOTOROLA
Memory
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