PIC18F6585 Datasheet, PDF (96/496 Pages) Microchip Technology – 64/68/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with ECAN Module

PIC18F6585/8585/6680/8680
REGISTER 6-1: MEMCON REGISTER
R/W-0
U-0
R/W-0 R/W-0
U-0
EBDIS⁽¹⁾
—
WAIT1 WAIT0
—
bit 7
U-0
R/W-0 R/W-0
—
WM1
WM0
bit 0
bit 7
bit 6
bit 5-4
bit 3-2
bit 1-0
EBDIS: External Bus Disable bit⁽¹⁾
1 = External system bus disabled, all external bus drivers are mapped as I/O ports
0 = External system bus enabled and I/O ports are disabled
Note 1: This bit is ignored when device is accessing external memory either to fetch an
instruction or perform TBLRD/TBLWT.
Unimplemented: Read as ‘0’
WAIT<1:0>: Table Reads and Writes Bus Cycle Wait Count bits
11 = Table reads and writes will wait 0 TCY
10 = Table reads and writes will wait 1 TCY
01 = Table reads and writes will wait 2 TCY
00 = Table reads and writes will wait 3 TCY
Unimplemented: Read as ‘0’
WM<1:0>: TBLWT Operation with 16-bit Bus bits
1x = Word Write mode: LSB and MSB word output, WRH active when MSB written
01 = Byte Select mode: TABLAT data copied on both MS and LS Byte, WRH and (UB or LB)
will activate
00 = Byte Write mode: TABLAT data copied on both MS and LS Byte, WRH or WRL will activate
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
Note: The MEMCON register is held in Reset in Microcontroller mode.
DS30491C-page 94
 2004 Microchip Technology Inc.