PIC18F6585 Datasheet, PDF (42/496 Pages) Microchip Technology – 64/68/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with ECAN Module

PIC18F6585/8585/6680/8680
TABLE 3-3: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Resets
WDT Reset
RESET Instruction
Stack Resets
Wake-up via WDT
or Interrupt
PORTJ
PIC18F6X8X PIC18F8X8X
xxxx xxxx
uuuu uuuu
uuuu uuuu
PORTH
PIC18F6X8X PIC18F8X8X
0000 xxxx
0000 uuuu
uuuu uuuu
PORTG
PORTF
PORTE
PORTD
PORTC
PIC18F6X8X PIC18F8X8X
PIC18F6X8X PIC18F8X8X
PIC18F6X8X PIC18F8X8X
PIC18F6X8X PIC18F8X8X
PIC18F6X8X PIC18F8X8X
--xx xxxx
x000 0000
---- -000
xxxx xxxx
xxxx xxxx
--uu uuuu
u000 0000
---- -000
uuuu uuuu
uuuu uuuu
--uu uuuu
u000 0000
---- -uuu
uuuu uuuu
uuuu uuuu
PORTB
PORTA^(5,6)
PIC18F6X8X PIC18F8X8X
PIC18F6X8X PIC18F8X8X
xxxx xxxx
-x0x 0000⁽⁵⁾
uuuu uuuu
-u0u 0000⁽⁵⁾
uuuu uuuu
-uuu uuuu⁽⁵⁾
SPBRGH
PIC18F6X8X PIC18F8X8X
0000 0000
0000 0000
uuuu uuuu
BAUDCON PIC18F6X8X PIC18F8X8X
-1-0 0-00
-1-0 0-00
-u-u u-uu
ECCP1DEL
ECANCON
TXERRCNT
RXERRCNT
COMSTAT
PIC18F6X8X PIC18F8X8X
PIC18F6X8X PIC18F8X8X
PIC18F6X8X PIC18F8X8X
PIC18F6X8X PIC18F8X8X
PIC18F6X8X PIC18F8X8X
0000 0000
0001 0000
0000 0000
0000 0000
0000 0000
0000 0000
0001 0000
0000 0000
0000 0000
0000 0000
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
CIOCON
PIC18F6X8X PIC18F8X8X
0000 ----
0000 ----
uuuu ----
BRGCON3 PIC18F6X8X PIC18F8X8X
00-- -000
00-- -000
uu-- -uuu
BRGCON2 PIC18F6X8X PIC18F8X8X
0000 0000
0000 0000
uuuu uuuu
BRGCON1 PIC18F6X8X PIC18F8X8X
0000 0000
0000 0000
uuuu uuuu
CANCON
CANSTAT
RXB0D7
RXB0D6
RXB0D5
PIC18F6X8X PIC18F8X8X
PIC18F6X8X PIC18F8X8X
PIC18F6X8X PIC18F8X8X
PIC18F6X8X PIC18F8X8X
PIC18F6X8X PIC18F8X8X
1000 000-
100- 000-
xxxx xxxx
xxxx xxxx
xxxx xxxx
1000 000-
100- 000-
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuu-
uuu- uuu-
uuuu uuuu
uuuu uuuu
uuuu uuuu
RXB0D4
PIC18F6X8X PIC18F8X8X
xxxx xxxx
uuuu uuuu
uuuu uuuu
RXB0D3
PIC18F6X8X PIC18F8X8X
xxxx xxxx
uuuu uuuu
uuuu uuuu
RXB0D2
PIC18F6X8X PIC18F8X8X
xxxx xxxx
uuuu uuuu
uuuu uuuu
RXB0D1
PIC18F6X8X PIC18F8X8X
xxxx xxxx
uuuu uuuu
uuuu uuuu
RXB0D0
PIC18F6X8X PIC18F8X8X
xxxx xxxx
uuuu uuuu
uuuu uuuu
RXB0DLC
PIC18F6X8X PIC18F8X8X
-xxx xxxx
-uuu uuuu
-uuu uuuu
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the
interrupt vector (0008h or 0018h).
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
4: See Table 3-2 for Reset value for specific condition.
5: Bit 6 of PORTA, LATA, and TRISA are enabled in ECIO and RCIO Oscillator modes only. In all other
oscillator modes, they are disabled and read ‘0’.
6: Bit 6 of PORTA, LATA and TRISA are not available on all devices. When unimplemented, they read ‘0’.
7: This register reads all ‘0’s until ECAN is set up in Mode 1 or Mode 2.
DS30491C-page 40
 2004 Microchip Technology Inc.