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PIC18F6585 Datasheet, PDF (484/496 Pages) Microchip Technology – 64/68/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with ECAN Module
PIC18F6585/8585/6680/8680
BnSIDL (TX/RX Buffer n Standard
Identifier, Low Byte in
Transmit Mode)................................................. 300
BRGCON1 (Baud Rate Control 1) ............................ 315
BRGCON2 (Baud Rate Control 2) ............................ 316
BRGCON3 (Baud Rate Control 3) ............................ 317
BSEL0 (Buffer Select 0) ............................................ 305
CANCON (CAN Control) ........................................... 278
CANSTAT (CAN Status) ........................................... 279
CCP1CON (CCP1 Control) ............................... 167, 175
CCP2CON (CCP2 Control) ....................................... 168
CIOCON (CAN I/O Control) ...................................... 318
CMCON (Comparator Control) ................................. 259
COMSTAT
(CAN Communication Status)........................... 284
CONFIG1H (Configuration 1 High) ........................... 347
CONFIG2H (Configuration 2 High) ........................... 349
CONFIG2L (Configuration 2 Low)............................. 348
CONFIG3H (Configuration 3 High) ........................... 350
CONFIG3L (Configuration 3 Low)............................. 349
CONFIG3L (Configuration Byte) ................................. 53
CONFIG4L (Configuration 4 Low)............................. 350
CONFIG5H (Configuration 5 High) ........................... 351
CONFIG5L (Configuration 5 Low)............................. 351
CONFIG6H (Configuration 6 High) ........................... 352
CONFIG6L (Configuration 6 Low)............................. 352
CONFIG7H (Configuration 7 High) ........................... 353
CONFIG7L (Configuration 7 Low)............................. 353
CVRCON (Comparator Voltage
Reference Control)............................................ 265
Device ID 1 ............................................................... 354
Device ID 2 ............................................................... 354
ECANCON (Enhanced CAN Control) ....................... 283
ECCP1AS (ECCP1 Auto-Shutdown
Control) ............................................................. 185
ECCP1DEL (ECCP1 Delay) ..................................... 184
EECON1 (Data EEPROM
Control 1) .................................................... 85, 102
INTCON (Interrupt Control) ....................................... 111
INTCON2 (Interrupt Control 2) .................................. 112
INTCON3 (Interrupt Control 3) .................................. 113
IPR1 (Peripheral Interrupt
Priority 1)........................................................... 120
IPR2 (Peripheral Interrupt
Priority 2)........................................................... 121
IPR3 (Peripheral Interrupt
Priority 3)................................................... 122, 321
LVDCON (LVD Control) ............................................ 271
MEMCON (Memory Control)....................................... 94
OSCCON (Oscillator Control) ..................................... 27
PIE1 (Peripheral Interrupt
Enable 1)........................................................... 117
PIE2 (Peripheral Interrupt
Enable 2)........................................................... 118
PIE3 (Peripheral Interrupt
Enable 3)................................................... 119, 320
PIR1 (Peripheral Interrupt
Request 1) ........................................................ 114
PIR2 (Peripheral Interrupt
Request 2) ........................................................ 115
PIR3 (Peripheral Interrupt
Flag 3)............................................................... 319
PIR3 (Peripheral Interrupt
Request 3) ........................................................ 116
PSPCON (Parallel Slave Port
Control)............................................................. 153
RCON (Reset Control).................................. 35, 82, 123
RCSTA (Receive Status and
Control)............................................................. 231
RXB0CON (Receive Buffer 0
Control)............................................................. 291
RXB1CON (Receive Buffer 1
Control)............................................................. 293
RXBnDLC (Receive Buffer n
Data Length Code) ........................................... 295
RXBnDm (Receive Buffer n
Data Field Byte m)............................................ 296
RXBnEIDH (Receive Buffer n
Extended Identifier, High Byte)......................... 294
RXBnEIDL (Receive Buffer n
Extended Identifier, Low Byte).......................... 295
RXBnSIDH (Receive Buffer n
Standard Indentifier, High Byte) ....................... 294
RXBnSIDL (Receive Buffer n
Standard Identifier, Low Byte) .......................... 294
RXERRCNT (Receive Error Count).......................... 296
RXFnEIDH (Receive Acceptance
Filter n Extended Identifier,
High Byte)......................................................... 307
RXFnEIDL (Receive Acceptance
Filter n Extended Identifier,
Low Byte).......................................................... 307
RXFnSIDH (Receive Acceptance
Filter n Standard Identifier Filter,
High Byte)......................................................... 306
RXFnSIDL (Receive Acceptance
Filter n Standard Identifier Filter,
Low Byte).......................................................... 306
RXMnEIDH (Receive Acceptance
Mask n Extended Identifier Mask,
High Byte)......................................................... 308
RXMnEIDL (Receive Acceptance
Mask n Extended Identifier Mask,
Low Byte).......................................................... 308
RXMnSIDH (Receive Acceptance
Mask n Standard Identifier Mask,
High Byte)......................................................... 307
RXMnSIDL (Receive Acceptance
Mask n Standard Identifier Mask,
Low Byte).......................................................... 308
SSPCON1 (MSSP Control 1
in SPI Mode)..................................................... 191
SSPCON2 (MSSP Control 2
in I2C Mode) ..................................................... 201
SSPSTAT (MSSP Status
in SPI Mode).................................................... 190
Status ......................................................................... 81
STKPTR (Stack Pointer)............................................. 55
T0CON (Timer0 Control) .......................................... 155
T1CON (Timer 1 Control) ......................................... 159
T2CON (Timer2 Control) .......................................... 162
T3CON (Timer3 Control) .......................................... 164
DS30491C-page 482
 2004 Microchip Technology Inc.