PIC18F6585 Datasheet, PDF (434/496 Pages) Microchip Technology – 64/68/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with ECAN Module

PIC18F6585/8585/6680/8680
TABLE 27-10: PROGRAM MEMORY WRITE TIMING REQUIREMENTS (VDD = 4.2 TO 5.5V)
Param.
No.
Symbol
Characteristics
Min
Typ Max Units
150 TADV2ALL Address Out Valid to ALE ↓ (address setup time)
0.25 TCY – 10 —
— ns
151 TALL2ADL ALE ↓ to Address Out Invalid (address hold time)
5
—
— ns
153 TWRH2ADL WRn ↑ to Data Out Invalid (data hold time)
5
—
— ns
154 TWRL
WRn Pulse Width
0.5 TCY – 5 0.5 TCY —
ns
156 TADV2WRH Data Valid before WRn ↑ (data setup time)
0.5 TCY – 10 —
— ns
157 TBSV2WRL Byte Select Valid before WRn ↓ (byte select setup time)
0.25 TCY
—
— ns
157A TWRH2BSI WRn ↑ to Byte Select Invalid (byte select hold time) 0.125 TCY – 5 —
— ns
166 TALH2ALH ALE ↑ to ALE ↑ (cycle time)
—
0.25 TCY —
ns
171 TALH2CSL Chip Enable Active to ALE ↓
—
—
10 ns
171A TUBL2OEH AD Valid to Chip Enable Active
0.25 TCY – 20 —
— ns
FIGURE 27-10:
RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND
POWER-UP TIMER TIMING
VDD
MCLR
Internal
POR
PWRT
Time-out
OSC
Time-out
Internal
Reset
Watchdog
Timer
Reset
33
32
I/O pins
Note: Refer to Figure 27-5 for load conditions.
30
34
31
34
DS30491C-page 432
 2004 Microchip Technology Inc.