PIC18F6585 Datasheet, PDF (447/496 Pages) Microchip Technology – 64/68/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with ECAN Module

PIC18F6585/8585/6680/8680
FIGURE 27-23: USART SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING
RC6/TX/CK
pin
RC7/RX/DT
pin
121
121
120
122
Note: Refer to Figure 27-5 for load conditions.
TABLE 27-23: USART SYNCHRONOUS TRANSMISSION REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min
Max
120 TCKH2DTV SYNC XMIT (MASTER & SLAVE)
Clock High to Data Out Valid
PIC18FXX8X —
40
PIC18LFXX8X —
100
121 TCKRF
Clock Out Rise Time and Fall Time PIC18FXX8X —
20
(Master mode)
PIC18LFXX8X —
50
122 TDTRF
Data Out Rise Time and Fall Time PIC18FXX8X —
20
PIC18LFXX8X —
50
Units Conditions
ns
ns
ns
ns
ns
ns
FIGURE 27-24: USART SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING
RC6/TX/CK
pin
RC7/RX/DT
pin
125
126
Note: Refer to Figure 27-5 for load conditions.
TABLE 27-24: USART SYNCHRONOUS RECEIVE REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min Max
125 TDTV2CKL SYNC RCV (MASTER & SLAVE)
Data Hold before CK ↓ (DT hold time)
126 TCKL2DTL Data Hold after CK ↓ (DT hold time)
10
—
15
—
Units
ns
ns
Conditions
 2004 Microchip Technology Inc.
DS30491C-page 445