PIC18F6585 Datasheet, PDF (125/496 Pages) Microchip Technology – 64/68/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with ECAN Module

PIC18F6585/8585/6680/8680
9.5 RCON Register
The RCON register contains the IPEN bit which is used
to enable prioritized interrupts. The functions of the
other bits in this register are discussed in more detail in
Section 4.14 “RCON Register”.
REGISTER 9-13: RCON REGISTER
R/W-0
U-0
U-0
R/W-1
R-1
IPEN
—
—
RI
TO
bit 7
R-1
R/W-0 R/W-0
PD
POR
BOR
bit 0
bit 7
bit 6-5
bit 4
bit 3
bit 2
bit 1
bit 0
IPEN: Interrupt Priority Enable bit
1 = Enable priority levels on interrupts
0 = Disable priority levels on interrupts (PIC16 Compatibility mode)
Unimplemented: Read as ‘0’
RI: RESET Instruction Flag bit
For details of bit operation, see Register 4-4.
TO: Watchdog Time-out Flag bit
For details of bit operation, see Register 4-4.
PD: Power-down Detection Flag bit
For details of bit operation, see Register 4-4.
POR: Power-on Reset Status bit
For details of bit operation, see Register 4-4.
BOR: Brown-out Reset Status bit
For details of bit operation, see Register 4-4.
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
 2004 Microchip Technology Inc.
DS30491C-page 123