PIC18F6585 Datasheet, PDF (77/496 Pages) Microchip Technology – 64/68/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with ECAN Module

PIC18F6585/8585/6680/8680
TABLE 4-3: REGISTER FILE SUMMARY (CONTINUED)
File Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on Details
POR, BOR on page:
B4D3⁽⁷⁾
B4D2⁽⁷⁾
B4D1⁽⁷⁾
B4D0⁽⁷⁾
B4DLC⁽⁷⁾
B4EIDL⁽⁷⁾
B4EIDH⁽⁷⁾
B4SIDL⁽⁷⁾
B4SIDH⁽⁷⁾
B4CON^{(5, 7)}
B3D7⁽⁷⁾
B3D6⁽⁷⁾
B3D5⁽⁷⁾
B3D4⁽⁷⁾
B3D3⁽⁷⁾
B3D2⁽⁷⁾
B3D1⁽⁷⁾
B3D0⁽⁷⁾
B3DLC⁽⁷⁾
B3EIDL⁽⁷⁾
B3EIDH⁽⁷⁾
B3SIDL⁽⁷⁾
B3SIDH⁽⁷⁾
B3CON^{(5, 7)}
B2D7⁽⁷⁾
B2D6⁽⁷⁾
B2D5⁽⁷⁾
B2D4⁽⁷⁾
B2D3⁽⁷⁾
B2D2⁽⁷⁾
B2D1⁽⁷⁾
B2D0⁽⁷⁾
B2DLC⁽⁷⁾
B2EIDL⁽⁷⁾
B2EIDH⁽⁷⁾
B2SIDL⁽⁷⁾
B2SIDH⁽⁷⁾
B4D37
B4D27
B4D17
B4D07
—
EID7
EID15
SID2
SID10
RXFUL/
TXB3IF
B3D77
B3D67
B3D57
B3D47
B3D37
B3D27
B3D17
B3D07
—
EID7
EID15
SID2
SID10
RXFUL/
TXBIF
B2D77
B2D67
B2D57
B2D47
B2D37
B2D27
B2D17
B2D07
—
EID7
EID15
SID2
SID10
B4D36
B4D26
B4D16
B4D06
RXRTR
EID6
EID14
SID1
SID9
RXM1/
TXABT
B3D76
B3D66
B3D56
B3D46
B3D36
B3D26
B3D16
B3D06
RXRTR
EID6
EID14
SID1
SID9
RXM1/
TXABT
B2D76
B2D66
B2D56
B2D46
B2D36
B2D26
B2D16
B2D06
RXRTR
EID6
EID14
SID1
SID9
B4D35
B4D25
B4D15
B4D05
RB1
EID5
EID13
SID0
SID8
RTRRO/
TXLARB
B3D75
B3D65
B3D55
B3D45
B3D35
B3D25
B3D15
B3D05
RB1
EID5
EID13
SID0
SID8
RTRRO/
TXLARB
B2D75
B2D65
B2D55
B2D45
B2D35
B2D25
B2D15
B2D05
RB1
EID5
EID13
SID0
SID8
B4D34
B4D24
B4D14
B4D04
RB0
EID4
EID12
SRR
SID7
FILHIT4/
TXERR
B3D74
B3D64
B3D54
B3D44
B3D34
B3D24
B3D14
B3D04
RB0
EID4
EID12
SRR
SID7
FILHIT4/
TXERR
B2D74
B2D64
B2D54
B2D44
B2D34
B2D24
B2D14
B2D04
RB0
EID4
EID12
SRR
SID7
B4D33
B4D23
B4D13
B4D03
DLC3
EID3
EID11
EXID/
EXIDE⁽⁵⁾
SID6
FILHIT3/
TXREQ
B3D73
B3D63
B3D53
B3D43
B3D33
B3D23
B3D13
B3D03
DLC3
EID3
EID11
EXID/
EXIDE⁽⁵⁾
SID6
FILHIT3/
TXREQ
B2D73
B2D63
B2D53
B2D43
B2D33
B2D23
B2D13
B2D03
DLC3
EID3
EID11
EXID/
EXIDE⁽⁵⁾
SID6
B4D32
B4D22
B4D12
B4D02
DLC2
EID2
EID10
—
B4D31
B4D21
B4D11
B4D01
DLC1
EID1
EID9
EID17
B4D30
B4D20
B4D10
B4D00
DLC0
EID0
EID8
EID16
xxxx xxxx 44, 230
xxxx xxxx 44, 230
xxxx xxxx 44, 230
xxxx xxxx 44, 230
-xxx xxxx 44, 230
xxxx xxxx 44, 230
xxxx xxxx 44, 230
xxxx x-xx 44, 230
SID5
FILHIT2/
RTREN
B3D72
B3D62
B3D52
B3D42
B3D32
B3D22
B3D12
B3D02
DLC2
EID2
EID10
—
SID4
FILHIT1/
TXPRI1
B3D71
B3D61
B3D51
B3D41
B3D31
B3D21
B3D11
B3D01
DLC1
EID1
EID9
EID17
SID3
FILHIT0/
TXPRI0
B3D70
B3D60
B3D50
B3D40
B3D30
B3D20
B3D10
B3D00
DLC0
EID0
EID8
EID16
xxxx xxxx 44, 230
0000 0000 44, 230
xxxx xxxx 44, 230
xxxx xxxx 44, 230
xxxx xxxx 44, 230
xxxx xxxx 45, 230
xxxx xxxx 45, 230
xxxx xxxx 45, 230
xxxx xxxx 45, 230
xxxx xxxx 45, 230
-xxx xxxx 45, 230
xxxx xxxx 45, 230
xxxx xxxx 45, 230
xxxx x-xx 45, 230
SID5
FILHIT2/
RTREN
B2D72
B2D62
B2D52
B2D42
B2D32
B2D22
B2D12
B2D02
DLC2
EID2
EID10
—
SID4
FILHIT1/
TXPRI1
B2D71
B2D61
B2D51
B2D41
B2D31
B2D21
B2D11
B2D01
DLC1
EID1
EID9
EID17
SID3
FILHIT0/
TXPRI0
B2D70
B2D60
B2D50
B2D40
B2D30
B2D20
B2D10
B2D00
DLC0
EID0
EID8
EID16
xxxx xxxx 45, 230
0000 0000 45, 230
xxxx xxxx 45, 230
xxxx xxxx 45, 230
xxxx xxxx 45, 230
xxxx xxxx 45, 230
xxxx xxxx 45, 230
xxxx xxxx 45, 230
xxxx xxxx 45, 230
xxxx xxxx 45, 230
-xxx xxxx 45, 230
xxxx xxxx 45, 230
xxxx xxxx 45, 230
xxxx x-xx 45, 230
SID5
SID4
SID3 xxxx xxxx 45, 230
Legend:
Note 1:
2:
3:
4:
5:
6:
7:
x = unknown, u = unchanged, – = unimplemented, q = value depends on condition
RA6 and associated bits are configured as port pins in RCIO and ECIO Oscillator mode only and read ‘0’ in all other oscillator
modes.
Bit 21 of the TBLPTRU allows access to the device configuration bits.
These registers are unused on PIC18F6X80 devices; always maintain these clear.
These bits have multiple functions depending on the CAN module mode selection.
Meaning of this register depends on whether this buffer is configured as transmit or receive.
RG5 is available as an input when MCLR is disabled.
This register reads all ‘0’s until the ECAN module is set up in Mode 1 or Mode 2.
 2004 Microchip Technology Inc.
DS30491C-page 75