PIC18F6585 Datasheet, PDF (75/496 Pages) Microchip Technology – 64/68/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with ECAN Module

PIC18F6585/8585/6680/8680
TABLE 4-3: REGISTER FILE SUMMARY (CONTINUED)
File Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on Details
POR, BOR on page:
RXF15EIDH⁽⁷⁾
RXF15SIDL⁽⁷⁾
RXF15SIDH⁽⁷⁾
RXF14EIDL⁽⁷⁾
RXF14EIDH⁽⁷⁾
RXF14SIDL⁽⁷⁾
RXF14SIDH⁽⁷⁾
RXF13EIDL⁽⁷⁾
RXF13EIDH⁽⁷⁾
RXF13SIDL⁽⁷⁾
RXF13SIDH⁽⁷⁾
RXF12EIDL⁽⁷⁾
EID15
SID2
SID10
EID7
EID15
SID2
SID10
EID7
EID15
SID2
SID10
EID7
EID14
SID1
SID9
EID6
EID14
SID1
SID9
EID6
EID14
SID1
SID9
EID6
EID13
SID0
SID8
EID5
EID13
SID0
SID8
EID5
EID13
SID0
SID8
EID5
EID12
—
SID7
EID4
EID12
—
SID7
EID4
EID12
—
SID7
EID4
EID11
EXIDEN
SID6
EID3
EID11
EXIDEN
SID6
EID3
EID11
EXIDEN
SID6
EID3
EID10
—
SID5
EID2
EID10
—
SID5
EID2
EID10
—
SID5
EID2
EID9
EID17
SID4
EID1
EID9
EID17
SID4
EID1
EID9
EID17
SID4
EID1
EID8
EID16
SID3
EID0
EID8
EID16
SID3
EID0
EID8
EID16
SID3
EID0
xxxx xxxx 47, 230
xx-x x-xx 47, 230
xxxx xxxx 47, 230
xxxx xxxx 47, 230
xxxx xxxx 47, 230
xx-x x-xx 47, 230
xxxx xxxx 47, 230
xxxx xxxx 47, 230
xxxx xxxx 47, 230
xx-x x-xx 47, 230
xxxx xxxx 47, 230
xxxx xxxx 47, 230
RXF12EIDH⁽⁷⁾
RXF12SIDL⁽⁷⁾
RXF12SIDH⁽⁷⁾
RXF11EIDL⁽⁷⁾
RXF11EIDH⁽⁷⁾
RXF11SIDL⁽⁷⁾
RXF11SIDH⁽⁷⁾
RXF10EIDL⁽⁷⁾
RXF10EIDH⁽⁷⁾
RXF10SIDL⁽⁷⁾
RXF10SIDH⁽⁷⁾
RXF9EIDL⁽⁷⁾
RXF9EIDH⁽⁷⁾
RXF9SIDL⁽⁷⁾
RXF9SIDH⁽⁷⁾
RXF8EIDL⁽⁷⁾
RXF8EIDH⁽⁷⁾
RXF8SIDL⁽⁷⁾
RXF8SIDH⁽⁷⁾
RXF7EIDL⁽⁷⁾
RXF7EIDH⁽⁷⁾
RXF7SIDL⁽⁷⁾
RXF7SIDH⁽⁷⁾
RXF6EIDL⁽⁷⁾
RXF6EIDH⁽⁷⁾
RXF6SIDL⁽⁷⁾
RXF6SIDH⁽⁷⁾
EID15
SID2
SID10
EID7
EID15
SID2
SID10
EID7
EID15
SID2
SID10
EID7
EID15
SID2
SID10
EID7
EID15
SID2
SID10
EID7
EID15
SID2
SID10
EID7
EID15
SID2
SID10
EID14
SID1
SID9
EID6
EID14
SID1
SID9
EID6
EID14
SID1
SID9
EID6
EID14
SID1
SID9
EID6
EID14
SID1
SID9
EID6
EID14
SID1
SID9
EID6
EID14
SID1
SID9
EID13
SID0
SID8
EID5
EID13
SID0
SID8
EID5
EID13
SID0
SID8
EID5
EID13
SID0
SID8
EID5
EID13
SID0
SID8
EID5
EID13
SID0
SID8
EID5
EID13
SID0
SID8
EID12
—
SID7
EID4
EID12
—
SID7
EID4
EID12
—
SID7
EID4
EID12
—
SID7
EID4
EID12
—
SID7
EID4
EID12
—
SID7
EID4
EID12
—
SID7
EID11
EXIDEN
SID6
EID3
EID11
EXIDEN
SID6
EID3
EID11
EXIDEN
SID6
EID3
EID11
EXIDEN
SID6
EID3
EID11
EXIDEN
SID6
EID3
EID11
EXIDEN
SID6
EID3
EID11
EXIDEN
SID6
EID10
—
SID5
EID2
EID10
—
SID5
EID2
EID10
—
SID5
EID2
EID10
—
SID5
EID2
EID10
—
SID5
EID2
EID10
—
SID5
EID2
EID10
—
SID5
EID9
EID17
SID4
EID1
EID9
EID17
SID4
EID1
EID9
EID17
SID4
EID1
EID9
EID17
SID4
EID1
EID9
EID17
SID4
EID1
EID9
EID17
SID4
EID1
EID9
EID17
SID4
EID8
EID16
SID3
EID0
EID8
EID16
SID3
EID0
EID8
EID16
SID3
EID0
EID8
EID16
SID3
EID0
EID8
EID16
SID3
EID0
EID8
EID16
SID3
EID0
EID8
EID16
SID3
xxxx xxxx 47, 230
xx-x x-xx 47, 230
xxxx xxxx 47, 230
xxxx xxxx 47, 230
xxxx xxxx 47, 230
xx-x x-xx 47, 230
xxxx xxxx 47, 230
xxxx xxxx 47, 230
xxxx xxxx 47, 230
xx-x x-xx 48, 230
xxxx xxxx 48, 230
xxxx xxxx 47, 230
xxxx xxxx 48, 230
xx-x x-xx 48, 230
xxxx xxxx 48, 230
xxxx xxxx 48, 230
xxxx xxxx 48, 230
xx-x x-xx 48, 230
xxxx xxxx 48, 230
xxxx xxxx 48, 230
xxxx xxxx 48, 230
xx-x x-xx 48, 230
xxxx xxxx 48, 230
xxxx xxxx 48, 230
xxxx xxxx 48, 230
xx-x x-xx 48, 230
xxxx xxxx 48, 230
RXF5EIDL
EID7
EID6
EID5
EID4
EID3
EID2
EID1
EID0 xxxx xxxx 43, 230
RXF5EIDH
EID15
EID14
EID13
EID12
EID11
EID10
EID9
EID8 xxxx xxxx 43, 230
Legend:
Note 1:
2:
3:
4:
5:
6:
7:
x = unknown, u = unchanged, – = unimplemented, q = value depends on condition
RA6 and associated bits are configured as port pins in RCIO and ECIO Oscillator mode only and read ‘0’ in all other oscillator
modes.
Bit 21 of the TBLPTRU allows access to the device configuration bits.
These registers are unused on PIC18F6X80 devices; always maintain these clear.
These bits have multiple functions depending on the CAN module mode selection.
Meaning of this register depends on whether this buffer is configured as transmit or receive.
RG5 is available as an input when MCLR is disabled.
This register reads all ‘0’s until the ECAN module is set up in Mode 1 or Mode 2.
 2004 Microchip Technology Inc.
DS30491C-page 73