PIC18F6585 Datasheet, PDF (310/496 Pages) Microchip Technology – 64/68/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with ECAN Module

PIC18F6585/8585/6680/8680
REGISTER 23-42: RXMnSIDL: RECEIVE ACCEPTANCE MASK n STANDARD IDENTIFIER MASK
REGISTERS, LOW BYTE [0 ≤ n ≤ 1]
R/W-x
SID2
R/W-x
SID1
R/W-x
SID0
U-0
R/W-0
U-0
—
EXIDEN⁽¹⁾
—
R/W-x
EID17
R/W-x
EID16
bit 7
bit 0
bit 7-5
bit 4
bit 3
bit 2
bit 1-0
SID2:SID0: Standard Identifier Mask bits, or Extended Identifier Mask bits EID20:EID18
Unimplemented: Read as ‘0’
Mode 0:
Unimplemented: Read as ‘0’
Mode 1, 2:
EXIDEN: Extended Identifier Filter Enable Mask bit⁽¹⁾
1 = Messages selected by EXIDEN bit in RXFnSIDL will be accepted
0 = Both standard and extended identifier messages will be accepted
Note 1: This bit is available in Mode 1 and 2 only.
Unimplemented: Read as ‘0’
EID17:EID16: Extended Identifier Mask bits
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
REGISTER 23-43: RXMnEIDH: RECEIVE ACCEPTANCE MASK n EXTENDED IDENTIFIER MASK
REGISTERS, HIGH BYTE [0 ≤ n ≤ 1]
R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x
EID15 EID14 EID13 EID12 EID11 EID10
EID9
EID8
bit 7
bit 0
bit 7-0
EID15:EID8: Extended Identifier Mask bits
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
REGISTER 23-44: RXMnEIDL: RECEIVE ACCEPTANCE MASK n EXTENDED IDENTIFIER MASK
REGISTERS, LOW BYTE [0 ≤ n ≤ 1]
R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x
EID7
EID6
EID5
EID4
EID3
EID2
EID1
EID0
bit 7
bit 0
bit 7-0
EID7:EID0: Extended Identifier Mask bits
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
DS30491C-page 308
 2004 Microchip Technology Inc.