PIC18F6585 Datasheet, PDF (132/496 Pages) Microchip Technology – 64/68/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with ECAN Module

PIC18F6585/8585/6680/8680
TABLE 10-3: PORTB FUNCTIONS
Name
Bit#
Buffer
Function
RB0/INT0
RB1/INT1
RB2/INT2
RB3/INT3/CCP2⁽³⁾
bit 0 TTL/ST⁽¹⁾ Input/output pin or external interrupt input 0. Internal software
programmable weak pull-up.
bit 1 TTL/ST⁽¹⁾ Input/output pin or external interrupt input 1. Internal software
programmable weak pull-up.
bit 2 TTL/ST⁽¹⁾ Input/output pin or external interrupt input 2. Internal software
programmable weak pull-up.
bit 3 TTL/ST⁽⁴⁾ Input/output pin or external interrupt input 3. Capture 2 input/
Compare 2 output/PWM output (when CCP2MX configuration bit is
enabled, all PIC18FXX85 operating modes except Microcontroller
mode). Internal software programmable weak pull-up.
RB4/KBI0
RB5/KBI1/PGM
RB6/KBI2/PGC
RB7/KBI3/PGD
bit 4
TTL
Input/output pin (with interrupt-on-change). Internal software
programmable weak pull-up.
bit 5 TTL/ST⁽²⁾ Input/output pin (with interrupt-on-change). Internal software
programmable weak pull-up. Low-voltage ICSP enable pin.
bit 6 TTL/ST⁽²⁾ Input/output pin (with interrupt-on-change). Internal software
programmable weak pull-up. Serial programming clock.
bit 7 TTL/ST⁽²⁾ Input/output pin (with interrupt-on-change). Internal software
programmable weak pull-up. Serial programming data.
Legend: TTL = TTL input, ST = Schmitt Trigger input
Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt.
2: This buffer is a Schmitt Trigger input when used in Serial Programming mode.
3: RC1 is the alternate assignment for CCP2 when CCP2MX is not set (all operating modes except
Microcontroller mode).
4: This buffer is a Schmitt Trigger input when configured as the CCP2 input.
TABLE 10-4: SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2 Bit 1 Bit 0
PORTB
RB7
RB6
RB5
RB4
RB3
RB2
RB1
LATB
LATB Data Output Register
TRISB PORTB Data Direction Register
INTCON
GIE/
GIEH
PEIE/
GIEL
TMR0IE INT0IE
RBIE TMR0IF INT0IF
INTCON2 RBPU INTEDG0 INTEDG1 INTEDG2 INTEDG3 TMR0IP INT3IP
INTCON3 INT2IP INT1IP INT3IE INT2IE INT1IE INT3IF INT2IF
Legend: x = unknown, u = unchanged. Shaded cells are not used by PORTB.
RB0
RBIF
RBIP
INT1IF
Value on
POR, BOR
xxxx xxxx
xxxx xxxx
1111 1111
0000 0000
1111 1111
1100 0000
Value on
all other
Resets
uuuu uuuu
uuuu uuuu
1111 1111
0000 0000
1111 1111
1100 0000
DS30491C-page 130
 2004 Microchip Technology Inc.