PIC18F6585 Datasheet, PDF (445/496 Pages) Microchip Technology – 64/68/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with ECAN Module

PIC18F6585/8585/6680/8680
FIGURE 27-21: MASTER SSP I²C BUS START/STOP BITS TIMING WAVEFORMS
SCL
SDA
91
90
93
92
Start
Condition
Note: Refer to Figure 27-5 for load conditions.
Stop
Condition
TABLE 27-21: MASTER SSP I²C BUS START/STOP BITS REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min
Max Units
Conditions
90
TSU:STA Start Condition
100 kHz mode 2(TOSC)(BRG + 1) — ns Only relevant for
Setup Time
400 kHz mode 2(TOSC)(BRG + 1) —
1 MHz mode⁽¹⁾ 2(TOSC)(BRG + 1)
—
Repeated Start
condition
91
THD:STA Start Condition
100 kHz mode 2(TOSC)(BRG + 1) — ns After this period, the
Hold Time
400 kHz mode 2(TOSC)(BRG + 1) —
1 MHz mode⁽¹⁾ 2(TOSC)(BRG + 1)
—
first clock pulse is
generated
92
TSU:STO Stop Condition
100 kHz mode 2(TOSC)(BRG + 1)
—
ns
Setup Time
400 kHz mode 2(TOSC)(BRG + 1) —
1 MHz mode⁽¹⁾ 2(TOSC)(BRG + 1)
—
93
THD:STO Stop Condition
100 kHz mode 2(TOSC)(BRG + 1)
—
ns
Hold Time
400 kHz mode 2(TOSC)(BRG + 1) —
1 MHz mode⁽¹⁾ 2(TOSC)(BRG + 1)
—
Note 1: Maximum pin capacitance = 10 pF for all I²C pins.
FIGURE 27-22:
SCL
SDA
In
SDA
Out
MASTER SSP I²C BUS DATA TIMING
103
100
101
90
91
106
107
109
109
Note: Refer to Figure 27-5 for load conditions.
102
92
110
 2004 Microchip Technology Inc.
DS30491C-page 443