PIC18F6585 Datasheet, PDF (13/496 Pages) Microchip Technology – 64/68/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with ECAN Module

PIC18F6585/8585/6680/8680
FIGURE 1-2:
PIC18F8X8X BLOCK DIAGRAM
AD7:AD0
Data Bus<8>
21 ^{Table Pointer<21>}
inc/dec logic
8
8
21
21
PCLATU PCLATH
Address Latch
Program Memory
(64 Kbytes)
Data Latch
PCU PCH PCL
Program Counter
31 Level Stack
4
BSR
Table Latch
Decode
Data Latch
Data RAM
(3328 bytes)
Address Latch
12
Address<12>
12
FSR0
FSR1
FSR2
4
Bank0, F
12
inc/dec
logic
16
8
ROM Latch
IR
A16, AD15:AD8
8
Instruction
Decode &
Control
OSC2/CLKO/RA6
OSC1/CLKI
Timing
Generation
Precision
Band Gap
Reference
PRODH PRODL
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Brown-out
Reset
Test Mode
Select
RG5/ VDD, VSS
MCLR
3
BITOP
8
RJ0/ALE
RJ1/OE
RJ2/WRL
RJ3/WRH
RJ4/BA0
RJ5/CE
RJ6/LB
RJ7/UB
8 x 8 Multiply
8
W
8
8
8
ALU<8>
8
PORTJ
BOR
LVD
Timer0
Timer1
Timer2
Timer3
PORTA
PORTB
PORTC
PORTD
PORTE
PORTF
PORTG
PORTH
RA0/AN0
RA1/AN1
RA2/AN2/VREF-
RA3/AN3/VREF+
RA4/T0CKI
RA5/AN4/LVDIN
OSC2/CLKO/RA6
RB2/INT2:RB0/INT0
RB3/INT3/CCP2⁽¹⁾
RB4/KBI0
RB5/KBI1/PGM
RB6/KBI2/PGC
RB7/KBI3/PGD
RC0/T1OSO/T13CKI
RC1/T1OSI/CCP2⁽¹⁾
RC2/CCP1/P1A
RC3/SCK/SCL
RC4/SDI/SDA
RC5/SDO
RC6/TX/CK
RC7/RX/DT
RD7/PSP7/AD7:
RD0/PSP0/AD0
RE0/RD/AD8
RE1/WR/AD9
RE2/CS/AD10
RE3/AD11
RE4/AD12
RE5/AD13/P1C⁽²⁾
RE6/AD14/P1B⁽²⁾
RE7/CCP2⁽¹⁾/AD15
RF0/AN5
RF1/AN6/C2OUT
RF2/AN7/C1OUT
RF3/AN8/C2IN+
RF4/AN9/C2IN-
RF5/AN10/C1IN+/CVREF
RF6/AN11/C1IN-
RF7/SS
RG0/CANTX1
RG1/CANTX2
RG2/CANRX
RG3
RG4/P1D
RG5/MCLR/VPP
RH7/AN15/P1B⁽²⁾
RH6/AN14/P1C⁽²⁾
RH5/AN13
RH4/AN12
RH3/A19:RH0/A16
Comparator ECCP1
CCP2
AUSART
ECAN Module
Synchronous
Serial Port
10-bit
ADC
Note 1: The CCP2 pin placement depends on the CCP2MX and Processor mode settings.
2: P1B and P1C pin placement depends on the ECCPMX setting.
 2004 Microchip Technology Inc.
DS30491C-page 11