PIC18F6585 Datasheet, PDF (14/496 Pages) Microchip Technology – 64/68/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with ECAN Module

PIC18F6585/8585/6680/8680
TABLE 1-2: PIC18F6585/8585/6680/8680 PINOUT I/O DESCRIPTIONS
Pin Name
Pin Number
PIC18F6X8X
PIC18F8X8X
Pin
Type
TQFP PLCC TQFP
Buffer
Type
Description
RG5/MCLR/VPP
RG5
MCLR
VPP
7
16
9
Master Clear (input) or programming
voltage (input).
I
ST
General purpose input pin.
I
ST
Master Clear (Reset) input. This pin is
an active-low Reset to the device.
P
Programming voltage input.
OSC1/CLKI
OSC1
CLKI
39 50
49
Oscillator crystal or external clock input.
I CMOS/ST Oscillator crystal input or external clock
source input. ST buffer when configured
in RC mode; otherwise CMOS.
I CMOS
External clock source input. Always
associated with pin function OSC1
(see OSC1/CLKI, OSC2/CLKO pins).
OSC2/CLKO/RA6
OSC2
CLKO
RA6
40 51
50
Oscillator crystal or clock output.
O
—
Oscillator crystal output.
Connects to crystal or resonator in
Crystal Oscillator mode.
O
—
In RC mode, OSC2 pin outputs CLKO
which has 1/4 the frequency of OSC1
and denotes the instruction cycle rate.
I/O
TTL
General purpose I/O pin.
Legend: TTL
ST
I
P
= TTL compatible input
= Schmitt Trigger input with CMOS levels
= Input
= Power
CMOS
Analog
O
OD
= CMOS compatible input or output
= Analog input
= Output
= Open-Drain (no P diode to VDD)
Note 1: Alternate assignment for CCP2 in all operating modes except Microcontroller – applies to PIC18F8X8X only.
2: Default assignment when CCP2MX is set.
3: External memory interface functions are only available on PIC18F8X8X devices.
4: CCP2 is multiplexed with this pin by default when configured in Microcontroller mode; otherwise, it is
multiplexed with either RB3 or RC1.
5: PORTH and PORTJ are only available on PIC18F8X8X (80-pin) devices.
6: PSP is available in Microcontroller mode only.
7: On PIC18F8X8X devices, these pins can be multiplexed with RH7/RH6 by changing the ECCPMX
configuration bit.
DS30491C-page 12
 2004 Microchip Technology Inc.